LM4F111B2QR Datasheet, PDF (647/1113 Pages) Texas Instruments – Microcontroller

Stellaris^® LM4F111B2QR Microcontroller
Figure 10-5. 16-Bit PWM Mode Example
Count
GPTMTnR=GPTMnMR
0xC350
GPTMTnR=GPTMnMR
0x411A
TnEN set
Output
Signal
TnPWML = 0
TnPWML = 1
Time
When synchronizing the timers using the GPTMSYNC register, the timer must be properly configured
to avoid glitches on the CCP outputs. Both the PLO and the MRSU bits must be set in the GPTMTnMR
register. Figure 10-6 on page 647 shows how the CCP output operates when the PLO and MRSU bits
are set and the GPTMTnMATCHR value is greater than the GPTMTnILR value.
Figure 10-6. CCP Output, GPTMTnMATCHR > GPTMTnILR
GPTMnILR
GPTMnMATCHR
CCP
CCP set if GPTMnMATCHR ≠ GPTMnILR
Figure 10-7 on page 648 shows how the CCP output operates when the PLO and MRSU bits are set
and the GPTMTnMATCHR value is the same as the GPTMTnILR value. In this situation, if the PLO
April 25, 2012
647
Texas Instruments-Advance Information