ADS8900B Datasheet, PDF (64/76 Pages) Texas Instruments – 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, Integrated LDO, and multiSPI Digital Interface

ADS8900B, ADS8902B, ADS8904B
SBAS728 – NOVEMBER 2016
www.ti.com
9 Power-Supply Recommendations
The devices have two separate power supplies: RV_DD and DV_DD. The internal reference buffer and the internal
LDO operate on RV_DD. The ADC core operates on the LDO output (available on the DECAP pins). DV_DD is used
for the interface circuits. RV_DD and DV_DD can be independently set to any value within their permissible ranges.
The RV_DD supply voltage value defines the permissible range for the external reference voltage V_REF on REFIN
pin as:
2.5 V ≤ V_REF ≤ (RV_DD – 0.3) V
(19)
In other words, to use the external reference voltage of V_REF, set RV_DD so that:
3 V ≤ RV_DD ≤ (V_REF + 0.3) V
(20)
Place a 10-µF decoupling capacitor between the RVDD and GND pins, and between the DVDD and GND pins,
as shown in Figure 120. Use a minimum 1-µF decoupling capacitor between the DECAP pins and the GND pin.
RVDD
ADS89xxB
RVDD
DECAP
BUF
LDO
10 F
1F
ADC
GND
DVDD
DVDD
10 µF
Figure 120. Power-Supply Decoupling
64
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: ADS8900B ADS8902B ADS8904B