TMS320F28055_16 Datasheet, PDF (62/150 Pages) Texas Instruments – Piccolo Microcontrollers

TMS320F28055, TMS320F28054, TMS320F28053
TMS320F28052, TMS320F28051, TMS320F28050
SPRS797B – NOVEMBER 2012 – REVISED JULY 2014
(A)
INTOSC1TRIM Reg
Internal
OSC 1
OSC1CLK
(10 MHz)
OSCCLKSRC1
OSCE
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CLKCTL[WDCLKSRCSEL]
0
WDCLK
CPU-Watchdog
(OSC1CLK on XRS reset)
1
CLKCTL[INTOSC1OFF]
1 = Turn OSC Off
CLKCTL[INTOSC1HALT]
1 = Ignore HALT
(A)
INTOSC2TRIM Reg
WAKEOSC
Internal _OSC2CLK
OSC 2
(10 MHz)
OSCE
1 = Turn OSC Off
CLKCTL[INTOSC2OFF]
1 = Ignore HALT
1
CLKCTL[INTOSC2HALT]
XCLK[XCLKINSEL]
0 = GPIO38
1 = GPIO19
0
CLKCTL[XCLKINOFF]
0
1
XCLKIN
GPIO19
or
GPIO38
0
XCLKIN
CLKCTL[OSCCLKSRCSEL]
0
OSCCLK
PLL
(B)
(OSC1CLK on XRS reset) Missing-Clock-Detect Circuit
1
CLKCTL[TRM2CLKPRESCALE]
CLKCTL[TMR2CLKSRCSEL]
10
Prescale
11
/1, /2, /4,
/8, /16
01
OSCCLKSRC2
CLKCTL[OSCCLKSRC2SEL]
SYNC
Edge
Detect
01, 10, 11
CPUTMR2CLK
00
SYSCLKOUT
XTAL
X1
(Crystal)
OSC
X2
EXTCLK
WAKEOSC
(Oscillators enabled when this signal is high)
CLKCTL[XTALOSCOFF]
0 = OSC on (default on reset)
1 = Turn OSC off
A. Register loaded from TI OTP-based calibration function.
B. See Section 6.6.4 for details on missing clock detection.
Figure 6-7. Clock Tree
62
Detailed Description
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