SN74AUP1G80_16 Datasheet, PDF (6/25 Pages) Texas Instruments – LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SN74AUP1G80
SCES593E – JULY 2004 – REVISED MAY 2010
TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
f_clock
Clock frequency
t_w
Pulse duration, CLK high or low
t_su
Setup time before CLK↑
Data high
Data low
t_h
Hold time, data after CLK↑
V_CC
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
T_A = 25°C
TYP
3.4
3.4
0
www.ti.com
T_A = –40°C
to 85°C
MIN MAX
20
80
120
160
220
260
5.5
2.5
1.5
1.6
1.7
1.9
6.7
2.4
1.2
0.8
0.6
0.4
8.9
2
1.3
1.1
0.8
0.7
1
0
0
0
0
0
UNIT
MHz
ns
ns
ns
6
Submit Documentation Feedback
Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G80