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SN74AUP1G80_16 Datasheet, PDF (4/25 Pages) Texas Instruments – LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74AUP1G80
SCES593E – JULY 2004 – REVISED MAY 2010
www.ti.com
RECOMMENDED OPERATING CONDITIONS(1)
MIN
MAX UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current(2)
IOL
Low-level output current(2)
Δt/Δv
TA
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V to 3.6 V
0.8
VCC
0.65 × VCC
1.6
2
0
0
–40
3.6
0
0.35 × VCC
0.7
0.9
3.6
VCC
–20
–1.1
–1.7
–1.9
–3.1
–4
20
1.1
1.7
1.9
3.1
4
200
85
V
V
V
V
V
mA
mA
mA
mA
ns/V
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2) Defined by the signal integrity requirements and design-goal priorities.
4
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