DS90CR215_15 Datasheet, PDF (6/23 Pages) Texas Instruments – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz

DS90CR215, DS90CR216
SNLS129D – MARCH 1999 – REVISED APRIL 2013
Receiver Switching Characteristics (continued)
Over recommended operating supply and −40°C to +85°C ranges unless otherwise specified
Symbol
Parameter
Min
RCOL
RxCLK OUT Low Time (Figure 11)
f = 40 MHz
10.0
f = 66 MHz
6.0
RSRC
RxOUT Setup to RxCLK OUT (Figure 11)
f = 40 MHz
6.5
f = 66 MHz
2.5
RHRC
RxOUT Hold to RxCLK OUT (Figure 11)
f = 40 MHz
6.0
f = 66 MHz
2.5
RCCD
RxCLK IN to RxCLK OUT Delay (Figure 13)
f = 40 MHz
4.0
f = 66 MHz
5.0
RPLLS
Receiver Phase Lock Loop Set (Figure 15)
RPDD
Receiver Powerdown Delay (Figure 19)
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Typ Max Units
13.0
ns
7.8
ns
14.0
ns
8.0
ns
8.0
ns
4.0
ns
6.7
8.0
ns
6.6
9.0
ns
10 ms
1
μs
AC Timing Diagrams
Figure 5. “Worst Case” Test Pattern
Figure 6. DS90CR215 (Transmitter) LVDS Output Load and Transition Times
6
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