DS90CR215_15 Datasheet, PDF (4/23 Pages) Texas Instruments – +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz

DS90CR215, DS90CR216
SNLS129D – MARCH 1999 – REVISED APRIL 2013
Electrical Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Conditions
V_TH
Differential Input High Threshold
V_TL
Differential Input Low Threshold
I _IN
Input Current
TRANSMITTER SUPPLY CURRENT
I_CCTW
Transmitter Supply Current Worst Case (with
Loads)
I_CCTZ
Transmitter Supply Current Power Down
RECEIVER SUPPLY CURRENT
I_CCRW
Receiver Supply Current Worst Case
I_CCRZ
Receiver Supply Current Power Down
V _CM = +1.2V
V _IN = +2.4V, V_CC = 3.6V
V _IN = 0V, V_CC = 3.6V
R_L = 100Ω,
C_L = 5 pF,
Worst Case Pattern
(Figure 5 Figure 6),
T_A = −10°C to +70°C
f = 32.5 MHz
f = 37.5 MHz
f = 66 MHz
R_L = 100Ω,
C_L = 5 pF,
Worst Case Pattern
(Figure 5 Figure 6),
T_A = −40°C to +85°C
f = 40 MHz
f = 66 MHz
PWR DWN = Low
Driver Outputs in TRI-STATE
under Powerdown Mode
C_L = 8 pF,
Worst Case Pattern
(Figure 5 Figure 7), T
A ^{= −10°C to +70°C}
f = 32.5 MHz
f = 37.5 MHz
f = 66 MHz
C_L = 8 pF,
Worst Case Pattern
(Figure 5 Figure 7),
T_A = −40°C to +85°C
f = 40 MHz
f = 66 MHz
PWR DWN = Low
Receiver Outputs Stay Low during
Powerdown Mode
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Min Typ Max Unit
s
+100 mV
−100
mV
±10 μA
±10 μA
31
45 mA
32
50 mA
37
55 mA
38
51 mA
42
55 mA
10
55 μA
49
65 mA
53
70 mA
78 105 mA
55
82 mA
78 105 mA
10
55 μA
Transmitter Switching Characteristics
Over recommended operating supply and −40°C to +85°C ranges unless otherwise specified
Symbol
Parameter
Min
Typ
LLHT
LVDS Low-to-High Transition Time (Figure 6)
0.5
LHLT
LVDS High-to-Low Transition Time (Figure 6)
0.5
TCIT
TxCLK IN Transition Time (Figure 8)
TCCS
TPPos0
TxOUT Channel-to-Channel Skew (Figure 9)
Transmitter Output Pulse Position for Bit0 ⁽¹⁾
(Figure 20)
f = 40 MHz
250
−0.4
0
TPPos1
Transmitter Output Pulse Position for Bit1
3.1
3.3
TPPos2
Transmitter Output Pulse Position for Bit2
6.5
6.8
TPPos3
Transmitter Output Pulse Position for Bit3
10.2
10.4
TPPos4
Transmitter Output Pulse Position for Bit4
13.7
13.9
TPPos5
Transmitter Output Pulse Position for Bit5
17.3
17.6
TPPos6
Transmitter Output Pulse Position for Bit6
21.0
21.2
Max
Units
1.5
ns
1.5
ns
5
ns
ps
0.4
ns
4.0
ns
7.6
ns
11.0
ns
14.6
ns
18.2
ns
21.8
ns
(1) The min. and max. are based on the actual bit position of each of the 7 bits within the LVDS data stream across PVT.
4
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