BQ25890_16 Datasheet, PDF (6/69 Pages) Texas Instruments – Adjustable Voltage USB On-the-Go Boost Mode

bq25890, bq25892
SLUSC86B – MARCH 2015 – REVISED MAY 2016
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NAME
CE
PIN
bq25890
9
ILIM
10
TS
11
QON
12
BAT
SYS
13,14
15,16
PGND
SW
BTST
REGN
PMID
17,18
19,20
21
22
23
DSEL
24
NC
–
PowerPAD™
bq25892
9
10
11
12
13, 14
15,16
17,18
19,20
21
22
23
–
24
Pin Functions (continued)
TYPE ⁽¹⁾
DESCRIPTION
Active low Charge Enable pin.
DI
Battery charging is enabled when CHG_CONFIG = 1 and CE pin = Low. CE pin must be pulled
High or Low.
Input current limit Input. ILIM pin sets the maximum input current and can be used to monitor input
current
ILIM pin sets the maximum input current limit by regulating the ILIM voltage at 0.8 V. A resistor is
connected from ILIM pin to ground to set the maximum limit as I_INMAX = K_ILIM/R_ILIM . The actual
AI
input current limit is the lower limit set by ILIM pin (when EN_ILIM bit is high) or IIINLIM register
bits. Input current limit of less than 500 mA is not support on ILIM pin.
ILIM pin can also be used to monitor input current when the voltage is below 0.8V. The input
current is proportional to the voltage on ILIM pin and can be calculated by I_IN = (K_ILIM x V_ILIM) /
(R_ILIM x 0.8)
The ILIM pin function can be disabled when EN_ILIM bit is 0.
Temperature qualification voltage input.
AI
Connect a negative temperature coefficient thermistor. Program temperature window with a resistor
divider from REGN to TS to GND. Charge suspends when either TS pin is out of range.
Recommend 103AT-2 thermistor.
BATFET enable/reset control input.
When BATFET is in ship mode, a logic low of t_SHIPMODE (typical 1sec) duration turns on BATFET to
exit shipping mode. .
DI
When VBUS is not plugged-in, a logic low of t_{QON_RST} (typical 15sec) duration resets SYS (system
power) by turning BATFET off for t_{BATFET_RST} (typical 0.3sec) and then re-enable BATFET to
provide full system power reset.
The pin contains an internal pull-up to maintain default high logic
P
Battery connection point to the positive terminal of the battery pack.
The internal BATFET is connected between BAT and SYS. Connect a 10uF closely to the BAT pin.
System connection point.
P
The internal BATFET is connected between BAT and SYS. When the battery falls below the
minimum system voltage, switch-mode converter keeps SYS above the minimum system voltage.
Connect a 20uF closely to the SYS pin.
Power ground connection for high-current power converter node.
P
Internally, PGND is connected to the source of the n-channel LSFET. On PCB layout, connect
directly to ground connection of input and output capacitors of the charger. A single point
connection is recommended between power PGND and the analog GND near the IC PGND pin.
Switching node connecting to output inductor.
P
Internally SW is connected to the source of the n-channel HSFET and the drain of the n-channel
LSFET. Connect the 0.047µF bootstrap capacitor from SW to BTST.
PWM high side driver positive supply.
P
Internally, the BTST is connected to the anode of the boost-strap diode. Connect the 0.047 µF
bootstrap capacitor from SW to BTST.
PWM low side driver positive supply output.
P
Internally, REGN is connected to the cathode of the boost-strap diode. Connect a 4.7 µF (10 V
rating) ceramic capacitor from REGN to analog GND. The capacitor should be placed close to the
IC. REGN also serves as bias rail of TS pin.
Connected to the drain of the reverse blocking MOSFET (RBFET) and the drain of HSFET.
DO Given the total input capacitance, put 1µF on VBUS to PGND, and the rest capacitance on PMID to
PGND.
Open-drain D+/D- multiplexer selection output.
Connect the DSEL to a logic rail via 10-KΩ resistor. The pin is normally float and pull-up by
DO
external resistor. During Input Source Type Detection , the pin drives low to indicate the bq25890
D+/D- detection is in progress and needs to take control of D+, D- signals. When detection is
completed, the pin keeps low when DCP or MaxCharge™ adapter is detected. The pin returns to
float and pulls high by external resistor when other input source type is detected
No Connect
Exposed pad beneath the IC for heat dissipation. Always solder PowerPAD Pad to the board, and
P
have vias on the PowerPAD plane star-connecting to PGND and ground plane for high-current
power converter.
6
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