BQ25890_16 Datasheet, PDF (22/69 Pages) Texas Instruments – Adjustable Voltage USB On-the-Go Boost Mode

bq25890, bq25892
SLUSC86B – MARCH 2015 – REVISED MAY 2016
Table 1. Non-Standard Adapter Detection
NON-STANDARD
ADAPTER
Divider 1
Divider 2
Divider 3
Divider 4
D+ THRESHOLD
V_D+ within V_{2P7_VTH}
V_D+ within V_{1P2_VTH}
V_D+ within V_{2P0_VTH}
V_D+ within V_{2P7_VTH}
D- THRESHOLD
V_D- within V_{2P0_VTH}
V_D- within V_{1P2_VTH}
V_D- within V_{2P7_VTH}
V_D- within V_{2P7_VTH}
INPUT CURRENT LIMIT
2.1A
2A
1A
2.4A
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Table 2. Adjustable High Voltage Adapter D+/D- Output Configurations
ADJUSTABLE HIGH VOLTAGE HANDSHAKE
MaxCharge (12V)
MaxCharge (9V)
D+
I_{1P6MA_ISINK}
V_{3p45_VSRC}
D-
V_{3p45_VSRC}
I_{1P6MA_ISINK}
OUTPUT
12 V
9V
After the Input Source Type Detection is done, an INT pulse is asserted to the host. In addition, the following
registers including Input Current Limit register (IINLIM), VBUS_STAT, and SDP_STAT are updated as below:
D+/D- DETECTION
USB SDP (USB500)
USB CDP
USB DCP
Divider 3
Divider 1
Divider 4
Divider 2
MaxCharge
Unknown Adapter
Table 3. bq25890 Result
INPUT CURRENT LIMIT
(IINLIM)
500 mA
1.5 A
3.25 A
1A
2.1 A
2.4 A
2A
1.5 A
500 mA
SDP_STAT
1
1
1
1
1
1
1
1
1
VBUS_STAT
001
010
011
110
110
110
110
100
101
9.2.3.3.2 PSEL/OTG Pins Set Input Current Limit (bq25892)
The bq25892 has PSEL/OTG interface for input current limit setting to interface with USB PHY. It directly takes
the USB PHY device output to decide whether the input is USB host or charging port. To implement USB100 in
the system, the host can enter HiZ mode by setting EN_HIZ bit after 2 min charging with 500 mA input current
limit.
INPUT DETECTION
USB SDP (USB500)
Adapter
BAT VOLTAGE
X
X
Table 4. bq25892 Result
PSEL PIN
High
Low
INPUT CURRENT LIMIT
(IINLIM)
500mA
3.25A
SDP_STAT
1
1
VBUS_STAT
001
010
22
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