BQ2205LYPWR Datasheet, PDF (6/14 Pages) Texas Instruments – POWER MONITORING AND SWITCHING CONTROLLER FOR 3.3-V SRAM

bq2205LY
SLUS581 − FEBRUARY 2004
FUNCTIONAL DESCRIPTION
Two banks of CMOS static RAM can be battery-backed using the VOUT and conditioned chip-enable output
pins from the bq2205. As the voltage input VCC slews down during a power failure, the two-conditioned chip
enable outputs, CE_CON1 and CE_CON2, are forced inactive independent of the chip enable input, CE. This activity
unconditionally write-protects the external SRAM as VCC falls to an out-of-tolerance threshold V_PFD. As the
supply continues to fall past V_PFD, an internal switching device forces VOUT to the backup energy source.
CE_CON1 and CE_CON2 are held high by the VOUT energy source.
During power-up, VOUT is switched back to the 3.3-V supply as VCC rises above the backup cell input voltage
sourcing VOUT. Outputs CE_CON1 and CE_CON2 are held inactive for time t_CER after the power supply has reached
V_PFD, independent of the CE input, to allow for processor stabilization.
During power-valid operation, the CE input is passed through to one of the two CE_CONx outputs with a
propagation delay of less than t_CED. The CE input is output on one of the two CE_CONx output pins; depending
on the level of bank select input A. See truth table below.
Table 1. Truth Table
INPUT
CE
A
H
x
L
L
L
H
OUTPUT
CECON1
H
CECON2
H
L
H
H
L
Bank select input A is usually tied to a high-order address pin so that a large nonvolatile memory can be
designed using lower-density memory devices. Non-volatility and decoding are achieved by hardware hookup
as shown in the application diagram.
The RST output can be used as the power-on reset for a microprocessor. Access to the external RAM may begin
when RST returns inactive.
BATTERY BACKUP INPUT
Backup energy source, BC_P, input is provided on the bq2205 for use with an external primary cell. The primary
cell input is designed to accept any 3-V primary battery (non-rechargeable), typically some type of lithium
chemistry.
Power-Down and Power-Up Cycle
The bq2205 continuously monitors VCC for out-of-tolerance. During a power failure, when VCC falls below
V_PFD, the bq2205 write-protects the external SRAM. The power source is switched to BC_P when V_CC is less
than V_PFD and BC_P is greater than V_PFD, or when V_CC is less than BC_P and BC_P is less than V_PFD. When VCC
is above V_PFD, the power source is V_CC. Write-protection continues for t_CER time after VCC rises above V_PFD.
An external CMOS static RAM is battery-backed using the VOUT and chip enable output pins from the bq2205.
As the voltage input V_CC slews down during a power failure, the chip enable output, CE_CONx, is forced inactive
independent of the chip enable input CE.
As the supply continues to fall past V_PFD, an internal switching device forces VOUT to the external backup
energy source. CE_CONx is held high by the VOUT energy source.
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