BQ2205LYPWR Datasheet, PDF (5/14 Pages) Texas Instruments – POWER MONITORING AND SWITCHING CONTROLLER FOR 3.3-V SRAM

TERMINAL FUNCTIONS
NAME
A
BCP
BW
CE
CECON1
CECON2
N/C
RST
VCC
VOUT
VSS
TERMINAL
bq2205LY
1
9
15
11
10
14
2, 3, 6, 7
16
12
13
4, 5, 8
I/O
DESCRIPTION
I SRAM bank select input
I Backup supply input
O Battery warning output (open-drain)
I Chip enable input (active low)
O Conditioned chip enable output 1
O Conditioned chip enable output 2
− No connect. These pins must be left floating.
O Power-up reset to system CPU output (open-drain)
I Main supply input
O SRAM supply output
− Ground input
PW PACKAGE
(TOP VIEW)
A
1
N/C
2
N/C
3
V_SS
4
V_SS
5
N/C
6
N/C
7
V_SS
8
16
RST
15
BW
14
CE_CON2
13
V_OUT
12
V_CC
11
CE
10
CE_CON1
9
BC_P
N/C no connection
bq2205LY
SLUS581 − FEBRUARY 2004
www.ti.com
5