LM3S3654 Datasheet, PDF (59/963 Pages) Texas Instruments – Stellaris® LM3S3654 Microcontroller

Stellaris^® LM3S3654 Microcontroller
1.3.5.2
eight input channels plus an internal temperature sensor. Four buffered sample sequencers allow
rapid sampling of up to eight analog input sources without controller intervention. Each sample
sequencer provides flexible programming with fully configurable input source, trigger events, interrupt
generation, and sequencer priority. The ADC module has a digital comparator function that allows
the conversion value to be diverted to a comparison unit that provides eight digital comparators.
The LM3S3654 microcontroller provides one ADC module with the following features:
■ Eight analog input channels
■ Single-ended and differential-input configurations
■ On-chip internal temperature sensor
■ Maximum sample rate of 500 thousand samples/second
■ Optional phase shift in sample time programmable from 22.5º to 337.5º
■ Four programmable sample conversion sequencers from one to eight entries long, with
corresponding conversion result FIFOs
■ Flexible trigger control
– Controller (software)
– Timers
– Analog Comparators
– GPIO
■ Hardware averaging of up to 64 samples
■ Digital comparison unit providing eight digital comparators
■ Converter uses an internal 3-V reference or an external reference
■ Power and ground for the analog circuitry is separate from the digital power and ground
■ Efficient transfers using Micro Direct Memory Access Controller (µDMA)
– Dedicated channel for each sample sequencer
– ADC module uses burst requests for DMA
Analog Comparators (see page 864)
An analog comparator is a peripheral that compares two analog voltages and provides a logical
output that signals the comparison result. The LM3S3654 microcontroller provides two independent
integrated analog comparators that can be configured to drive an output or generate an interrupt or
ADC event.
The comparator can provide its output to a device pin, acting as a replacement for an analog
comparator on the board, or it can be used to signal the application via interrupts or triggers to the
ADC to cause it to start capturing a sample sequence. The interrupt generation and ADC triggering
logic is separate. This means, for example, that an interrupt can be generated on a rising edge and
the ADC triggered on a falling edge.
January 21, 2012
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