TM4C129CNCPDT Datasheet, PDF (58/1753 Pages) Texas Instruments – Tiva Microcontroller

Architectural Overview
1.3.1.6
1.3.2
1.3.2.1
Floating-Point Unit (FPU) (see page 144)
The FPU fully supports single-precision add, subtract, multiply, divide, multiply and accumulate,
and square root operations. It also provides conversions between fixed-point and floating-point data
formats, and floating-point constant instructions.
■ 32-bit instructions for single-precision (C float) data-processing operations
■ Combined multiply and accumulate instructions for increased precision (Fused MAC)
■ Hardware support for conversion, addition, subtraction, multiplication with optional accumulate,
division, and square-root
■ Hardware support for denormals and all IEEE rounding modes
■ 32 dedicated 32-bit single-precision registers, also addressable as 16 double-word registers
■ Decoupled three stage pipeline
On-Chip Memory
The TM4C129CNCPDT microcontroller is integrated with the following set of on-chip memory and
features:
■ 256 KB single-cycle SRAM
■ 1024 KB Flash memory
■ 6KB EEPROM
■ Internal ROM loaded with TivaWare™ for C Series software:
– TivaWare^™ Peripheral Driver Library
– TivaWare Boot Loader
– Advanced Encryption Standard (AES) cryptography tables
– Cyclic Redundancy Check (CRC) error detection functionality
SRAM (see page 588)
The TM4C129CNCPDT microcontroller provides 256 KB of single-cycle on-chip SRAM. The internal
SRAM of the device is located at offset 0x2000.0000 of the device memory map.
The SRAM is implemented using four 32-bit wide interleaving SRAM banks (separate SRAM arrays)
which allow for increased speed between memory accesses. The SRAM memory provides nearly
2 GB/s memory bandwidth at a 120 MHz clock frequency.
Because read-modify-write (RMW) operations are very time consuming, ARM has introduced
bit-banding technology in the Cortex-M4F processor. With a bit-band-enabled processor, certain
regions in the memory map (SRAM and peripheral space) can use address aliases to access
individual bits in a single, atomic operation.
Data can be transferred to and from SRAM by the following masters:
■ µDMA
■ USB
58
June 18, 2014
Texas Instruments-Production Data