OMAP3530_17 Datasheet, PDF (58/265 Pages) Texas Instruments – Applications Processors

OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-2. Ball Characteristics (CBC Pkg.)⁽¹⁾ (continued)
BALL
BALL TOP PIN NAME
BOTTOM [1]
[2]
[3]
MODE [4]
R2
NA
uart1_rts
0
gpio_149
4
safe_mode
7
H3
NA
uart1_rx
0
mcbsp1_clkr
2
mcspi4_clk
3
gpio_151
4
safe_mode
7
L4
NA
uart1_tx
0
gpio_148
4
safe_mode
7
Y24
NA
uart2_cts
0
AA24
mcbsp3_dx
1
gpt9_pwm_e
2
vt
gpio_144
4
safe_mode
7
NA
uart2_rts
0
AD21
mcbsp3_dr
1
gpt10_pwm_
2
evt
gpio_145
4
safe_mode
7
NA
uart2_rx
0
AD22
mcbsp3_fsx
1
gpt8_pwm_e
2
vt
gpio_147
4
safe_mode
7
NA
uart2_tx
0
mcbsp3_clkx
1
gpt11_pwm_
2
evt
gpio_146
4
safe_mode
7
F23
NA
uart3_cts_rct
0
x
gpio_163
4
safe_mode
7
F24
NA
uart3_rts_sd
0
gpio_164
4
safe_mode
7
H24
NA
uart3_rx_irrx
0
gpio_165
4
safe_mode
7
G24
NA
uart3_tx_irtx
0
gpio_166
4
safe_mode
7
J23
NA
hdq_sio
0
sys_altclk
1
TYPE [5]
O
IO
-
I
IO
IO
IO
-
O
IO
-
I
IO
IO
IO
-
O
I
IO
IO
-
I
IO
IO
IO
-
O
IO
IO
IO
-
IO
IO
-
O
IO
-
I
IO
-
O
IO
-
IOD
I
BALL
RESET
STATE [6]
BALL
RESET REL.
STATE [7]
RESET REL.
MODE [8]
POWER [9]
L
L
7
vdds
HYS [10]
Yes
BUFFER
STRENG TH
(mA) [11]
4 ⁽¹³⁾
PULLUP
/DOWN
TYPE [12]
PU100/
PD100
IO CELL [13]
LVCMOS
L
L
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
L
L
7
vdds
Yes
4 ⁽¹³⁾
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
H
H
7
vdds
Yes
4
PU100/
LVCMOS
PD100
58
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