English
Language : 

OMAP3530_17 Datasheet, PDF (43/265 Pages) Texas Instruments – Applications Processors
OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL TOP PIN NAME MODE [4] TYPE [5]
BOTTOM [1] [2]
[3]
safe_mode 7
AA17
NA
jtag_ntrst 0
I
AA13
NA
jtag_tck
0
I
AA12
NA
jtag_rtck
0
O
AA18
NA
jtag_tms_tms 0
IO
c
AA20
NA
jtag_tdi
0
I
AA19
NA
jtag_tdo
0
O
AA11
NA
jtag_emu0 0
IO
gpio_11
4
IO
safe_mode 7
AA10
NA
jtag_emu1 0
IO
gpio_31
4
IO
safe_mode 7
AF10
NA
etk_clk
0
O
mcbsp5_ 1
IO
clkx
mmc3_clk 2
O
hsusb1_stp 3
O
gpio_12
4
IO
mm1_rxdp 5
IO
hsusb1_tll_st 6
I
p
AE10
NA
etk_ctl
0
O
mmc3_cmd 2
IO
hsusb1_clk 3
O
gpio_13
4
IO
hsusb1_tll_cl 6
O
k
AF11
NA
etk_d0
0
O
mcspi3_
1
IO
simo
mmc3_dat4 2
IO
hsusb1_
3
IO
data0
gpio_14
4
IO
mm1_rxrcv 5
IO
hsusb1_tll_ 6
IO
data0
AG12
NA
etk_d1
0
O
mcspi3_
1
IO
somi
hsusb1_
3
IO
data1
gpio_15
4
IO
mm1_txse0 5
IO
hsusb1_tll_ 6
IO
data1
AH12
NA
etk_d2
0
O
mcspi3_cs0 1
IO
hsusb1_
3
IO
data2
gpio_16
4
IO
mm1_txdat 5
IO
hsusb1_tll_d 6
IO
ata2
AE13
NA
etk_d3
0
O
mcspi3_clk 1
IO
mmc3_dat3 2
IO
BALL
RESET
STATE [6]
BALL
RESET REL. POWER [9] HYS [10]
RESET REL. MODE [8]
STATE [7]
L
L
0
vdds
Yes
L
L
0
vdds
Yes
L
0
0
vdds
Yes
H
H
0
vdds
Yes
H
H
0
vdds
Yes
L
Z
0
vdds
Yes
H
H
0
vdds
Yes
H
H
0
vdds
Yes
H
H
4
vdds
Yes
H
H
4
vdds
Yes
H
H
4
vdds
Yes
H
H
4
vdds
Yes
H
H
4
vdds
Yes
H
H
4
vdds
Yes
BUFFER PULLUP
STRENG TH /DOWN
(mA) [11] TYPE [12]
IO CELL [13]
NA
PU/ PD
LVCMOS
NA
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
NA
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
Copyright © 2008–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: OMAP3530 OMAP3525
TERMINAL DESCRIPTION
43