OMAP3530_17 Datasheet, PDF (182/265 Pages) Texas Instruments – Applications Processors

OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
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LPDDR Device
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Region should encompass all LPDDR circuitry and varies depending
on placement. Non-LPDDR signals should not be routed on the
LPDDR signal layers within the LPDDR keep out region. Non-LPDDR
signals may be routed in the region provided they are routed on
layers separated from LPDDR signal layers by a ground layer. No
breaks should be allowed in the reference ground layers in this
region. In addition, the 1.8 V power plane should cover the entire keep
out region.
Figure 6-20. LPDDR Keepout Region
6.4.2.5 Net Classes
Table 6-17 lists the clock net classes for the LPDDR interface. Table 6-18 lists the signal net classes, and
associated clock net classes, for the signals in the LPDDR interface. These net classes are used for the
termination and routing rules that follow.
CLOCK NET CLASS
CK
DQS0
DQS1
DQS2
DQS3
Table 6-17. Clock Net Class Definitions
OMAP PIN NAMES
sdrc_clk/sdrc_nclk
sdrc_dqs0
sdrc_dqs1
sdrc_dqs2
sdrc_dqs3
CLOCK NET CLASS
ADDR_CTRL
DQ0
DQ1
DQ2
DQ3
Table 6-18. Signal Net Class Definitions
ASSOCIATED CLOCK NET CLASS
CK
DQS0
DQS1
DQS2
DQS3
OMAP PIN NAMES
sdrc_ba, sdrc_a, sdrc_ncs0, sdrc_ncas,
sdrc_nras, sdrc_nwe, sdrc_cke0
sdrc_d, sdrc_dm0
sdrc_d, sdrc_dm1
sdrc_d, sdrc_dm2
sdrc_d, sdrc_dm3
6.4.2.6 LPDDR Signal Termination
No terminations of any kind are required in order to meet signal integrity and overshoot requirements.
Serial terminators are permitted, if desired, to reduce EMI risk; however, serial terminations are the only
type permitted. Table 6-19 shows the specifications for the series terminators.
182 TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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