SM320F28335-HT_14 Datasheet, PDF (56/182 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-HT
SPRS682E – DECEMBER 2010 – REVISED JANUARY 2014
www.ti.com
3.5 Interrupts
Figure 3-3 shows how the various interrupt sources are multiplexed.
DMA ^Clear
Peripherals
(SPI, SCI, I2C, CAN, McBSP^(A),
EPWM^(A), ECAP, EQEP, ADC^(A))
INT1
to
INT12
C28
Core
WAKEINT
Sync
WDINT
Watchdog
LPMINT
Low Power Models
DMA
SYSCLKOUT
XINT1
Interrupt Control
XINT1 _Latch
XINT1CR(15:0)
XINT1CTR(15:0)
GPIOXINT1SEL(4:0)
XINT2
DMA
XINT2
ADC
Interrupt Control
XINT2CR(15:0)
XINT2CTR(15:0)
DMA
TINT0
CPU Timer 0
XINT2SOC
Latch
GPIOXINT2SEL(4:0)
INT14
INT13
TINT2
DMA
TINT1
CPU Timer 2
CPU Timer 1
Flash Wrapper
TOUT1
NMI
A. DMA-accessible
1
DMA
Interrupt Control
XNMICR(15:0)
XNMICTR(15:0)
XNMI_
XINT13
Latch
GPIOXNMISEL(4:0)
GPIO0.int
GPIO31.int
GPIO
Mux
Figure 3-3. External and PIE Interrupt Sources
56
Functional Overview
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