SM320F28335-HT_14 Datasheet, PDF (113/182 Pages) Texas Instruments – Digital Signal Controller (DSC)

SM320F28335-HT
www.ti.com
SPRS682E – DECEMBER 2010 – REVISED JANUARY 2014
6.4 Current Consumption
Table 6-1. Current Consumption by Power Supply Pins
MODE
Operational
(Flash) ⁽⁶⁾
IDLE
STANDBY
TEST CONDITIONS
The following peripheral
clocks are enabled:
• ePWM1/2/3/4/5/6
• eCAP1/2/3/4/5/6
• eQEP1/2
• eCAN-A
• SCI-A/B (FIFO
mode)
• SPI-A (FIFO
mode)
• ADC
• I2C
• CPU Timer 0/1/2
All PWM pins are
toggled at 150 kHz.
All I/O pins are left
unconnected. ⁽⁷⁾
T_C = -55°C to
125°C at
150-MHz
SYSCLKOUT
T_C = 150°C at
100-MHz
SYSCLKOUT
T_C = 210°C at
100-MHz
SYSCLKOUT
Flash is powered down.
XCLKOUT is turned off.
The following peripheral
clocks are enabled:
• eCAN-A
• SCI-A
• SPI-A
• I2C
T_C = -55°C to
125°C at
150-MHz
SYSCLKOUT
T_C = 150°C at
100-MHz
SYSCLKOUT
T_C = 210°C at
100-MHz
SYSCLKOUT
Flash is powered down.
Peripheral clocks are
off.
T_C = -55°C to
125°C at
150-MHz
SYSCLKOUT
T_C = 150°C at
100-MHz
SYSCLKOUT
T_C = 210°C at
100-MHz
SYSCLKOUT
I_DD
TYP⁽⁵⁾ MAX
290
315
300
330
220
350
100
120
110
140
120
160
8
15
20
40
20
60
I_DDIO ⁽¹⁾
TYP⁽⁵⁾ MAX
I_DD3VFL ⁽²⁾
TYP MAX
30
50
3
40
30
50
35
40
30
50
35
40
0.060 0.120 0.002 0.010
0.110 0.200 0.002 0.010
0.110 0.300 0.002 0.010
0.060 0.120 0.002 0.010
0.110 0.200 0.002 0.010
0.110 0.300 0.002 0.010
I_DDA18 ⁽³⁾
TYP⁽⁵⁾ MAX
I_DDA33 ⁽⁴⁾
TYP⁽⁵⁾ MAX
UNITS
30
35
1.5
2
35
40
1.5
2.2
mA
35
40
1.5
2.5
0.005 0.060 0.015 0.020
0.130 0.600 0.015 0.020
mA
0.130 0.600 0.015 0.020
0.005 0.600 0.015 0.020
0.130 0.600 0.015 0.020
mA
0.130 0.600 0.015 0.020
(1) I_DDIO current is dependent on the electrical loading on the I/O pins.
(2) The I_DD3VFL current indicated in this table is the flash read-current and does not include additional current for erase/write operations.
During flash programming, extra current is drawn from the V_DD and V_DD3VFL rails, as indicated in Table 6-65. If the user application
involves on-board flash programming, this extra current must be taken into account while architecting the power-supply stage.
(3) I_DDA18 includes current into V_DD1A18 and V_DD2A18 pins. In order to realize the I_DDA18 currents shown for IDLE, STANDBY, and HALT,
clock to the ADC module must be turned off explicitly by writing to the PCLKCR0 register.
(4) I_DDA33 includes current into V_DDA2 and V_DDAIO pins.
(5) For T_J = -55°C to 125°C, the TYP numbers are applicable over room temperature and nominal voltage. MAX numbers are at 125°C, and
MAX voltage (V_DD = 2.0 V; V_DDIO, V_DD3VFL, V_DDA = 3.6 V).
(6) When the identical code is run off SARAM, I_DD would increase as the code operates with zero wait states.
(7) The following is done in a loop:
• Data is continuously transmitted out of the SCI-A, SCI-B, SPI-A, McBSP-A, and eCAN-A ports.
• Multiplication/addition operations are performed.
• Watchdog is reset.
• ADC is performing continuous conversion. Data from ADC is transferred to SARAM through the DMA.
• 32-bit read/write of the XINTF is performed.
• GPIO19 is toggled.
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