TM4C123BH6PGE Datasheet, PDF (553/1333 Pages) Texas Instruments – Tiva TM4C123BH6PGE Microcontroller

Tiva^™ TM4C123BH6PGE Microcontroller
Register 8: Flash Write Buffer Valid (FWBVAL), offset 0x030
This register provides a bitwise status of which FWBn registers have been written by the processor
since the last write of the Flash memory write buffer. The entries with a 1 are written on the next
write of the Flash memory write buffer. This register is cleared after the write operation by hardware.
A protection violation on the write operation also clears this status.
Software can program the same 32 words to various Flash memory locations by setting the FWB[n]
bits after they are cleared by the write operation. The next write operation then uses the same data
as the previous one. In addition, if a FWBn register change should not be written to Flash memory,
software can clear the corresponding FWB[n] bit to preserve the existing data when the next write
operation occurs.
Flash Write Buffer Valid (FWBVAL)
Base 0x400F.D000
Offset 0x030
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
FWB[n]
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FWB[n]
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:0
Name
FWB[n]
Type
RW
Reset
0x0
Description
Flash Memory Write Buffer
Value Description
0 The corresponding FWBn register has no new data to be written.
1 The corresponding FWBn register has been updated since the
last buffer write operation and is ready to be written to Flash
memory.
Bit 0 corresponds to FWB0, offset 0x100, and bit 31 corresponds to
FWB31, offset 0x13C.
June 12, 2014
553
Texas Instruments-Production Data