TM4C123BH6PGE Datasheet, PDF (1289/1333 Pages) Texas Instruments – Tiva TM4C123BH6PGE Microcontroller

Tiva^™ TM4C123BH6PGE Microcontroller
23.6
23.6.1
Power and Brown-Out
Table 23-10. Power-On and Brown-Out Levels
Parameter Parameter Parameter Name
No.
Min
Nom
Max
Unit
P1
T_{VDDA_RISE} Analog Supply Voltage (VDDA) Rise Time
-
P2
T_{VDD_RISE} I/O Supply Voltage (VDD) Rise Time
-
P3
T_{VDDC_RISEa} Core Supply Voltage (VDDC) Rise Time
10.00
P4
V_POR
Power-On Reset Threshold
2.00
VDDA Power-OK Threshold (Rising Edge) 2.70
P5
V_{VDDA_POK VDDA Power-OK Threshold (Falling Edge)}
2.71
-
-
-
2.30
2.85
2.80
∞
µs
∞
µs
150.00
µs
2.60
V
3.00
V
2.89
V
P6
V_{VDD_POKb}
VDD Power-OK Threshold (Rising Edge)
VDD Power-OK Threshold (Falling Edge)
2.85
2.70
3.00
2.78
3.15
2.87
V
V
P7
V_{VDD_BOR0} Brown-Out 0 Reset Threshold
2.93
3.02
3.11
V
P8
V_{VDD_BOR1} Brown-Out 1 Reset Threshold
2.83
2.92
3.01
V
VDDC Power-OK Threshold (Rising Edge) 0.80
0.95
1.10
V
P9
V_{VDDC_POK VDDC Power-OK Threshold (Falling Edge)}
0.71
0.80
0.89
V
a. The MIN and MAX values are guaranteed by design assuming the external filter capacitor load is within the range of
CLDO. Please refer to “On-Chip Low Drop-Out (LDO) Regulator” on page 1297 for the CLDO value.
b. Digital logic, Flash memory, and SRAM are all designed to operate at VDD voltages below 2.70 V. The internal POK reset
protects the device from unpredictable operation on power down.
VDDA Levels
The V_DDA supply has two monitors:
■ Power-On Reset (POR)
■ Power-OK (POK)
The POR monitor is used to keep the analog circuitry in reset until the V_DDA supply has reached
the correct range for the analog circuitry to begin operating. The POK monitor is used to keep the
digital circuitry in reset until the V_DDA power supply is at an acceptable operational level. The digital
Power-On Reset (Digital POR) is only released when the Power-On Reset has deasserted and
all of the Power-OK monitors for each of the supplies indicate that power levels are in operational
ranges.
Once the V_DDA POK monitor has released the digital Power-On Reset on the initial power-up, voltage
drops on the V_DDA supply will only be reflected in the following bits. The digital Power-On Reset will
not be re-asserted.
■ VDDARIS bit in the Raw Interrupt Status (RIS) register (see page 239).
■ VDDAMIS bit in the Masked Interrupt Status and Clear (MISC) register (see page 243). This bit
is set only if the VDDAIM bit in the Interrupt Mask Control (IMC) register has been set.
Figure 23-4 on page 1290 shows the relationship between V_DDA, POR, POK, and an interrupt event.
June 12, 2014
Texas Instruments-Production Data
1289