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TMS470R1A288PGEA Datasheet, PDF (53/62 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller
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TMS470R1A288
16/32-Bit RISC Flash Microcontroller
SPNS106B – SEPTEMBER 2005 – REVISED AUGUST 2006
MULTI-BUFFERED A-TO-D CONVERTER (MibADC)
The multi-buffered A-to-D converter (MibADC) has a separate power bus for its analog circuitry that enhances
the A-to-D performance by preventing digital switching noise on the logic circuitry, which could be present on
VSS and VCC, from coupling into the A-to-D analog stage. All A-to-D specifications are given with respect to
ADREFLO unless otherwise noted.
Resolution
Monotonic
Output conversion code
10 bits (1024 values)
Assured
00h to 3FFh [00 for VAI≤ ADREFLO; 3FF for VAI≥ ADREFHI]
Table 12. MibADC Recommended Operating Conditions(1)
ADREFHI
ADREFLO
VAI
IAIC
A-to-D high-voltage reference source
A-to-D low-voltage reference source
Analog input voltage
Analog input clamp current(2)
(VAI < VSSAD - 0.3 or VAI > VCCAD + 0.3)
MIN
VSSAD
VSSAD
VSSAD - 0.3
-2
MAX
VCCAD
VCCAD
VCCAD + 0.3
2
(1) For VCCAD and VSSAD recommended operating conditions, see the "Device Recommended Operating Conditions" table.
(2) Input currents into any ADC input channel outside the specified limits could affect conversion results of other channels.
UNIT
V
V
V
mA
Table 13. Operating Characteristics Over Full Ranges of Recommended Operating Conditions(1)(2)
Ri
Ci
IAIL
IADREFHI
CR
EDNL
EINL
E TOT
PARAMETER
Analog input resistance
Analog input capacitance
Analog input leakage current
ADREFHI input current
Conversion range over which specified
accuracy is maintained
Differential nonlinearity error
Integral nonlinearity error
Total error/absolute accuracy
DESCRIPTION/CONDITIONS
See Figure 22.
See Figure 22.
Conversion
Sampling
See Figure 22.
ADREFHI = 3.6 V, ADREFLO = VSSAD
ADREFHI - ADREFLO
Difference between the actual step width
and the ideal value. See Figure 23.
Maximum deviation from the best straight
line through the MibADC. MibADC
transfer characteristics, excluding the
quantization error. See Figure 24.
Maximum value of the difference
between an analog value and the ideal
midstep value. See Figure 25.
MIN
TYP
MAX UNIT
250
500 Ω
10 pF
30 pF
-1
1 µA
5 mA
3
3.6 V
±2 LSB
±2 LSB
±2 LSB
(1) VCCAD = ADREFHI
(2) 1 LSB = (ADREFHI - ADREFLO)/ 210 for the MibADC
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