English
Language : 

TMS470R1A288PGEA Datasheet, PDF (19/62 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller
www.ti.com
TMS470R1A288
16/32-Bit RISC Flash Microcontroller
SPNS106B – SEPTEMBER 2005 – REVISED AUGUST 2006
The minimum size for an erase operation is one sector. The maximum size for a program operation is one 16-bit
word.
NOTE:
The flash external pump voltage (VCCP) is required for all operations (program, erase,
and read).
Execution can occur from one bank while programming/erasing any or all sectors of another bank. However,
execution can not occur from any sector within a bank that is being programmed or erased.
For more detailed information on flash program and erase operations, see the TMS470R1x F05 Flash Reference
Guide (literature number SPNU213).
HET RAM
The A288 device contains HET RAM. The HET RAM has a 64-instruction capability. The HET RAM is
configurable by the SYS module to be addressed within the range of 0x0000_0000 to 0xFFE0_0000. The HET
RAM is addressed through memory select 4.
XOR Share
The A288 HET peripheral contains the XOR-share feature. This feature allows two adjacent HET high-resolution
channels to be XORed together, making it possible to output smaller pulses than a standard HET. For more
detailed information on the HET XOR-share feature, see the TMS470R1x High-End Timer (HET) Reference
Guide (literature number SPNU199).
Peripheral Selects and Base Addresses
The A288 device uses 10 of the 16 peripheral selects to decode the base addresses of the peripherals. These
peripheral selects are fixed and transparent to the user because they are part of the decoding scheme used by
the SYS module.
Control registers for the peripherals, SYS module, and flash begin at the base addresses shown in Table 4.
Table 4. A288 Peripherals, System Module, and Flash Base Addresses
CONNECTING MODULE
SYSTEM
RESERVED
DWD
PSA
CIM
RTI
DMA
DEC
RESERVED
MMC
IEM
RESERVED
RESERVED
DMA CMD BUFFER
MSM
RESERVED
RESERVED
HET
ADDRESS RANGE
BASE ADDRESS
ENDING ADDRESS
0xFFFF_FFD0
0x FFFF_FFFF
0xFFFF_FF70
0xFFFF_FFCB
0xFFFF_FF60
0x FFFF_FF6F
0xFFFF_FF40
0xFFFF_FF5F
0xFFFF_FF20
0xFFFF_FF3F
0xFFFF_FF00
0xFFFF_FF1F
0xFFFF_FE80
0xFFFF_FEFF
0xFFFF_FE00
0xFFFF_FE7F
0xFFFF_FD80
0xFFFF_FDFF
0xFFFF_FD00
0xFFFF_FD7F
0xFFFF_FC00
0xFFFF_FCFF
0xFFFF_FB00
0xFFFF_FBFF
0xFFFF_FA00
0xFFFF_FAFF
0xFFFF_F800
0xFFFF_F9FF
0xFFFF_F700
0xFFFF_F7FF
0xFFF8_0000
0xFFFF_F6FF
0xFFF7_FD00
0xFFF7_FFFF
0xFFF7_FC00
0xFFF7_FCFF
PERIPHERAL SELECTS
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
PS[0]
Submit Documentation Feedback
19