LMH6550 Datasheet, PDF (5/33 Pages) National Semiconductor (TI) – Differential, High Speed Op Amp

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LMH6550
SNOSAK0I – DECEMBER 2004 – REVISED JANUARY 2015
Electrical Characteristics: ±5 V⁽¹⁾ (continued)
Single-ended in differential out, T_A = 25°C, V_S = ±5 V, V_CM = 0 V, R_F = R_G = 365 Ω, R_L = 500 Ω; unless specified.
PARAMETER
TEST CONDITIONS
MIN ⁽²⁾ TYP ⁽³⁾ MAX ⁽²⁾
Input Bias Current Average
(5)
9.6
Temperature Drift
Input Bias Difference
Difference in Bias Currents Between the
0.3
Two Inputs
CMRR
R_IN
C_IN
CMVR
Common-Mode Rejection Ratio
Input Resistance
DC, V_CM = 0 V, V_ID = 0 V
Differential
Input Capacitance
Differential
Input Common-Mode Voltage Range CMRR > 53 dB
72
82
5
1
+3.1
+3.2
−4.6
−4.7
V_CM PIN INPUT CHARACTERISTICS (COMMON-MODE FEEDBACK AMPLIFIER)
V_OSC
Input Offset Voltage
Common Mode, V_ID = 0
At extreme
temperatures
Input Offset Voltage Average
(5)
Temperature Drift
Input Bias Current
(6)
1
±5
±8
25
−2
V_CM CMRR
Input Resistance
V_ID = 0 V, 1-V Step on V_CM Pin, Measure
70
75
V_OD
25
Common-Mode Gain
OUTPUT PERFORMANCE
ΔV_O,CM/ΔV_CM
0.995
0.997
1.005
Output Voltage Swing
Peak to Peak,
Differential
At extreme
temperatures
7.38
7.8
7.18
Output Common-Mode Voltage
Range
V_ID = 0 V,
±3.69
±3.8
I_OUT
Linear Output Current
I_SC
Short Circuit Current
Output Balance Error
V_OUT = 0 V
Output Shorted to Ground
V_IN = 3 V Single-Ended ⁽⁷⁾
ΔV_OUT Common Mode /ΔV_OUT
Differential, V_OUT = 1 V_PP Differential, f =
10 MHz
±63
±75
±200
−68
MISCELLANEOUS PERFORMANCE
Enable Voltage Threshold
Pin 7
2.0
Disable Voltage Threshold
Enable Pin Current
Enable/Disable Time
Pin 7
V_EN =0 V ⁽⁶⁾
V_EN =4 V ⁽⁶⁾
1.5
-250
55
10
A_VOL
PSRR
Open Loop Gain
Power Supply Rejection Ratio
Supply Current
Differential
DC, ΔV_S = ±1 V
R_L = ∞
At extreme
temperatures
70
74
90
18
20
24
27
Disabled Supply Current
1
1.2
(7) The maximum output current (I_OUT) is determined by device power dissipation limitations.
UNIT
nA/°C
µA
dBc
MΩ
pF
V
mV
µV/°C
μA
dB
kΩ
V/V
V
V
mA
mA
dB
V
V
µA
ns
dB
dB
mA
mA
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