DAC8581_16 Datasheet, PDF (5/20 Pages) Texas Instruments – 16-BIT, HIGH-SPEED, LOW-NOISE, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER

Not Recommended For New Designs
DAC8581
www.ti.com
TIMING REQUIREMENTS⁽¹⁾
t_SCK
t_WSCK
t_Lead
t_TD
t_SU
t_HI
t_R
t_F
t_WAIT
t_UPDAC
PARAMETER
SCLK period
SCLK high or low time
Delay from falling CS to first rising SCLK
CS High between two active Periods
Data setup time (Input)
Data hold time (input)
Rise time
Fall time
Delay from 16th falling edge of SCLK to CS low
Delay from 16th falling edge of SCLK to DAC output
V_DD High to CS Low (power-up delay)
(1) Assured by design. Not production tested.
SLAS481C – AUGUST 2005 – REVISED OCTOBER 2012
MIN
MAX UNIT
20
ns
10
ns
20
ns
20
ns
5
ns
5
ns
30 ns
30 ns
100
ns
1
μs
100
μs
CS
SCLK
SDIN
t _td
t _sck
tLead t _wsck t _wsck
t_f
1st
2nd
t_su
t _hi
t_r
15th
BIT-15 (MSB)
BIT-14
BIT-13, …, 1
t _WAIT
16th
t_UPDAC
DAC Updated
BIT-0
-- Don’t Care
Figure 1. DAC8581 Timing Diagram
Copyright © 2005–2012, Texas Instruments Incorporated
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