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BQ24070RHLRG4 Datasheet, PDF (5/31 Pages) Texas Instruments – SINGLE-CHIP LI-ION CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC
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bq24070
bq24071
SLUS694F – MARCH 2006 – REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V(SET)
Battery charge current set
voltage (6)
K(SET)
Charge current set factor, BAT
USB MODE INPUT CURRENT LIMIT
Voltage on ISET1, VVCC ≥ 4.35 V,
VI(OUT)- VI(BAT) > V(DO-MAX),
VI(BAT) > V(LOWV)
100 mA ≤ IO(BAT) ≤ 1.5 A
10 mA ≤ IO(BAT) ≤ 100 mA(7)
2.47
2.50
2.53
V
375
425
450
300
450
600
I(USB)
USB input port current range
ISET2 = Low
ISET2 = High
80
90
100
mA
400
500
BAT PIN CHARGING VOLTAGE REGULATION, VO (BAT-REG) + V (DO-MAX) < VCC, ITERM < IBAT(OUT) ≤ 1 A
Battery charge voltage
4.2
V
VO(BAT-REG)
Battery charge voltage regulation TA = 25°C
accuracy
–0.5%
–1%
0.5%
1%
CHARGE TERMINATION DETECTION
I(TERM)
V(TERM)
TDGL(TERM)
Charge termination detection
range
VI(BAT) > V(RCH),
I(TERM) = (K(SET) × V(TERM))/ RSET
10
Charge termination set voltage,
VI(BAT) > V(RCH) , Mode = High
230
measured on ISET1
VI(BAT) > V(RCH) , Mode = Low
95
De-glitch time for termination
detection
tFALL = 100 ns, 10 mV overdrive,
ICHG increasing above or decreasing below
threshold
150
mA
250
270
mV
100
130
22.5
ms
TEMPERATURE SENSE COMPARATORS
VLTF
VHTF
ITS
TDGL(TF)
High voltage threshold
Low voltage threshold
Temperature sense current source
Temp fault at V(TS) > VLTF
Temp fault at V(TS) < VHTF
De-glitch time for temperature fault
detection (8)
R(TMR) = 50 kΩ, VI(BAT) increasing or
decreasing above and below;
100-ns fall time, 10-mv overdrive
2.465
0.485
94
2.500
0.500
100
22.5
2.535
V
0.515
V
106
μA
ms
BATTERY RECHARGE THRESHOLD
VRCH
Recharge threshold voltage
VO(BAT-
REG)
–0.075
VO(BAT-REG)
–0.100
VO(BAT-REG)
–0.125
V
TDGL(RCH)
De-glitch time for recharge
detection (8)
R(TMR) = 50 kΩ, VI(BAT) increasing
or decreasing below threshold,
100-ns fall time, 10-mv overdrive
STAT1, STAT2, AND PG, OPEN DRAIN (OD) OUTPUTS(9)
22.5
ms
VOL
Low-level output saturation voltage
IOL = 5 mA, An external pullup
resistor ≥ 1 K required.
0.25
V
ILKG
Input leakage current
ISET2, CE INPUTS
1
5
μA
VIL
VIH
IIL
IIH
IIL
IIH
t(CE-HLDOFF)
Low-level input voltage
High-level input voltage
Low-level input current, CE
High-level input current, CE
Low-level input current, ISET2
High-level input current, ISET2
Holdoff time, CE
VISET2 = 0.4 V
VISET2 = VCC
CE going low only
0
0.4
V
1.4
–1
1
μA
–20
40
3.3
6.2
ms
(6) For half-charge rate, V(SET) is 1.25 V ± 25 mV.
(7) Specification is for monitoring charge current via the ISET1 pin during voltage regulation mode, not for a reduced fast-charge level.
(8) All de-glitch periods are a function of the timer setting and is modified in DPPM or thermal regulation modes by the percentages that the
program current is reduced.
(9) See Charger Sleep mode for PG (VCC = VIN) specifications.
Copyright © 2006–2009, Texas Instruments Incorporated
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