BQ24070RHLRG4 Datasheet, PDF (13/31 Pages) Texas Instruments – SINGLE-CHIP LI-ION CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC

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bq24070
bq24071
SLUS694F – MARCH 2006 – REVISED DECEMBER 2009
its 1.75-A charge and the battery charge current is reduced from 1.25 A to 0.25 A. When the peak system
load drops to 0.5 A, the charge current returns to 1 A and the output voltage returns to its normal value.
2. Using DPPM provides a power savings compared to configurations without DPPM. Without DPPM, if the
system current plus charge current exceed the supply’s current limit, then the output is pulled down to the
battery. Linear chargers dissipate the unused power (V_IN-V_OUT) × I_LOAD. The current remains high (at current
limit) and the voltage drop is large for maximum power dissipation. With DPPM, the voltage drop is less
(V_IN-V_(DPPM-REG)) to the system which means better efficiency. The efficiency for charging the battery is the
same for both cases. The advantages include less power dissipation, lower system temperature, and better
overall efficiency.
3. The DPPM sustains the system voltage no matter what causes it to drop, if at all possible. It does this by
reducing the noncritical charging load while maintaining the maximum power output of the adaptor.
Note that the DPPM voltage, V_(DPPM), is programmed as follows:
V_{(DPPM−REG)} + I_(DPPM) R_(DPPM) SF
(1)
where
R_(DPPM) is the external resistor connected between the DPPM and VSS pins.
I_(DPPM) is the internal current source.
SF is the scale factor as specified in the specification table.
The safety timer is dynamically adjusted while in DPPM mode. The voltage on the ISET1 pin is directly
proportional to the programmed charging current. When the programmed charging current is reduced, due to
DPPM, the ISET1 and TMR voltages are reduced and the timer’s clock is proportionally slowed, extending the
safety time. In normal operation V(TMR) = 2.5 V; and, when the clock is slowed, V(TMR) is reduced. When
V(TMR) = 1.25 V, the safety timer has a value close to 2 times the normal operation timer value. See Figure 6
through Figure 7.
Case 2: USB Mode (Mode = L)
System Power
In this case, the system load is powered from a USB port through the internal switch Q1 (see Figure 5). Note that
in this case, Q1 regulates the total current to the 100-mA or 500-mA level, as selected on the ISET2 input. The
output, V_OUT, is regulated to 4.4 V (bq24070). The system's power management is responsible for keeping its
system load below the USB current level selected (if the battery is critically low or missing). Otherwise, the output
drops to the battery voltage; therefore, the system should have a low-power mode for USB power application.
The DPPM feature keeps the output from dropping below its programmed threshold, due to the battery charging
current, by reducing the charging current.
Charge Control
When in USB mode, Q1 regulates the input current to the value selected by the ISET2 pin (0.1/0.5 A). The
charge current to the battery is set by the ISET1 resistor (typically > 0.5 A). Because the charge current typically
is programmed for more current than the USB current limit allows, the output voltage drops to the battery voltage
or DPPM voltage, whichever is higher. If the DPPM threshold is reached first, the charge current is reduced until
V_OUT stops dropping. If V_OUT drops to the battery voltage, the battery is able to supplement the input current to
the system.
Dynamic Power-Path Management (DPPM)
The theory of operation is the same as described in CASE 1, except that Q1 is restricted to the USB current level
selected by the ISET2 pin.
Note that the DPPM voltage, V_(DPPM), is programmed as follows:
V_{(DPPM−REG)} + I_(DPPM) R_(DPPM) SF
(2)
where
R_(DPPM) is the external resistor connected between the DPPM and VSS pins.
I_(DPPM) is the internal current source.
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