BQ2063_15 Datasheet, PDF (49/60 Pages) Texas Instruments – SBS v1.1-COMPLIANT Li-ION GAS-GAUGE IC

Not Recommended For New Designs
bq2063
SBS v1.1ĆCOMPLIANT LiĆION GASĆGAUGE IC
WITH PROTECTOR INTERFACE
SLUS468E− MAY 2001 − REVISED APRIL 2002
PROGRAMMING INFORMATION
current taper termination characteristics
Two factors in the EEPROM set the current taper termination for Li-Ion battery packs. The two coded locations
are Current Taper Qual Voltage EE 0x4f and Current Taper Threshold EE 0x4e. Current taper termination occurs
during charging when the pack voltage is above the charging voltage minus CTQV (mV) and the charging
current is below CTT (mA) for at least 40 seconds.
Current
Taper
Qual
Voltage
+
CTQV
2
(21)
Current
Taper
Threshold
+
Rs < CTT
0.5625
(22)
where i = the desired current termination threshold in mA, and Rs = VFC sense resistor in ohms.
pack options
pack configuration
Pack Configuration EE 0x3f contains bit-programmable features.
b7
DMODE
b6
SEAL
b5
CSYNC
b4
CEDV
b3
VCOR
b2
EXTH
b1
OTVC
b0
4CELL
DMODE
The DMODE bit determines whether the LED outputs indicate AbsoluteStateOfCharge( ) or
RelativeStateOfCharge( )
0 LEDs reflect AbsoluteStateOfCharge( )
1 LEDs reflect RelativeStateOfCharge( )
SEAL
The SEAL bit determines the SMBus access state of the bq2063 on reset
0 SMBus commands (0x00-0xff) accessible for both read and write
1 SMBus read access limited to commands (0x05-0x1c) and (0x20-0x23). SMBus read/write access
limited to commands (0x00-0x04), (0x2f), and (0x3c-0x3f).
CSYNC
In usual operation of the bq2063, the CSYNC bit is set so that the coulomb counter is adjusted when a fast
charge termination is detected. In some applications, especially those where an externally controlled charger
is used, it may be desirable not to adjust the coulomb counter. In these cases the CSYNC bit should be cleared.
0 The bq2063 does not alter RM at the time of a valid charge termination
1 The bq2063 updates RM with a programmed percentage of FCC at a valid charger termination.
CEDV
The CEDV bit determines whether the bq2063 implements automatic EDV compensation to calculate the EDV0,
EDV1, and EDV2 thresholds base on rate, temperature, and capacity. If the bit is cleared, the bq2063 uses the
fixed values programmed in EEPROM for EDV0, EDV1, and EDV2. If the bit is set, the bq2063 calculates EDV0,
EDV1, and EDV2.
0 EDV compensation disabled
1 EDV compensation enabled
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
49