BQ2063_15 Datasheet, PDF (22/60 Pages) Texas Instruments – SBS v1.1-COMPLIANT Li-ION GAS-GAUGE IC

bq2063
Not Recommended For New Designs
SBS v1.1ĆCOMPLIANT LiĆION GASĆGAUGE IC
WITH PROTECTOR INTERFACE
SLUS468E− MAY 2001 − REVISED APRIL 2002
D RemainingCapacity( ): 0x03e9
For 0x160f17e903, the bq2063 transmits a PEC of 0xe8 to the host.
PEC enable in master mode
PEC for master mode broadcasts to the charger, host, or both can be enabled/disabled with the combination
of the bits HPE and CPE in Control Mode.
SMBus on and off state
The bq2063 detects whether the SMBus enters the Off State by monitoring the SMBC and SMBD lines. When
both signals are continually low for at least 2.5 s, the bq2063 detects the Off State. When the SMBC and SMBD
lines go high, the bq2063 detects the On State and can begin communication within 1 ms. One-MΩ pulldown
resistors on SMBC and SMBD are recommended for reliable Off State detection.
HDQ16
The HDQ16 interface is a command-based protocol. (See Figure 10.) A processor sends the command code
to the bq2063. The 8-bit command code consists of two fields: the 7-bit HDQ16 command code (bits 0-6) and
the 1-bit R/W field (MSB bit 7). The R/W field directs the bq2063 either to
D Store the next 16 bits of data to a specified register or
D Output 16 bits of data from the specified register
Send Host to bq2063
HDQ Command Code
Send Host to bq2063 or
Receive From bq2063
16 Bit data
Break
LSB
Bit0
Start-Bit
Address-Bit/Data-Bit Stop-Bit
R/W
MSB
Bit7
tRSPS
Figure 10. HDQ16 Communication Example
With HDQ16, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted first.
A bit transmission consists of three distinct sections. The first section starts the transmission by either the host
or the bq2063 taking the HDQ16 pin to a logic-low state for a period t_STRH;B. The next section is the actual
data-transmission, where the data bit is valid by the time t_DSU;B after the negative edge used to start
communication. The data bit is held for a period t_(DH;DV) to allow the host processor or bq2063 to sample the
data bit.
The final section is used to stop the transmission by returning the HDQ16 pin to a logic-high state by at least
the time t_SSUB after the negative edge used to start communication. The final logic-high state should continue
for a period t_CYCH;B to allow time to ensure that the bit transmission was stopped properly.
22
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265