OMAP5910JGDY2 Datasheet, PDF (48/171 Pages) Texas Instruments – Dual-Core Processor

Functional Overview
3.1 Functional Block Diagram Features
The OMAP5910 device includes the following functional blocks:
• ARM9TDMI-based MPU core
-- 16K-byte instruction cache and 8K-byte data cache
-- Memory Management Units (MMUs) for Instruction and Data
-- Two 64-entry Translation Look-Aside Buffers (TLBs) for MMUs
-- 17-word write buffer
• C55x DSP subsystem
-- 48K-word single-access RAM (SARAM) (96K bytes)
-- 32K-word dual-access RAM (DARAM) (64K bytes)
-- 16K-word ROM (32K bytes)
-- 24K-byte instruction cache
-- Six-channel DMA controller
-- Hardware Accelerators for DCT, iDCT, pixel interpolation, and motion estimation
• Nine-channel system DMA controller
• Traffic controller providing shared access to three memory interfaces:
-- EMIFF External Memory Interface providing 16-bit interface to 64M bytes of standard SDRAM
-- EMIFS External Memory Interface providing 16-bit interface to 128M bytes of Flash, ROM, or
asynchronous memories
-- Internal Memory Interface (IMIF) providing 32-bit interface to 192K bytes of internal SRAM
• DSP Memory Management Unit (MMU) configured by the MPU
• MPU Interface (MPUI) allowing MPU and System DMA to access DSP subsystem memory and DSP
public peripherals
• Local Bus Interface (with MMU) allowing USB host peripheral direct access to system memories.
• DSP Private Peripherals (accessible only by the DSP)
-- Three 32-bit general-purpose timers
-- Watchdog timer
-- Level 1/Level 2 interrupt handlers
• DSP Public Peripherals (accessible by the DSP, DSP DMA, and the MPU via the MPU interface)
-- Two Multichannel Buffered Serial Ports (McBSPs)
-- Two Multichannel Serial Interfaces (MCSIs) ideal for voice data
• MPU Private Peripherals (accessible only by the MPU)
-- Three 32-bit general-purpose timers
-- Watchdog Timer
-- Level 1/Level 2 interrupt handlers
-- Configuration Registers for pin-multiplexing and other device-level configurations
-- LCD controller supporting monochrome panels (STN) and color panels (STN or TFT)
48 SPRS197D
August 2002 -- Revised August 2004