AMC6821-Q1 Datasheet, PDF (48/54 Pages) Texas Instruments – INTELLIGENT TEMPERATURE MONITOR AND PWM FAN CONTROLLER

AMC6821-Q1
SBAS475 – JUNE 2009 ...................................................................................................................................................................................................... www.ti.com
TACH-DATA Register
Bit 7 (MSB)
TACH-DATA7
TACH-DATA-LByte Register (Address 0x08, Power-On Default = 0x00)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TACH-DATA6 TACH-DATA5 TACH-DATA4 TACH-DATA3 TACH-DATA2 TACH-DATA1
Bit 0 (LSB)
TACH-DATA0
TACH-DATA-HByte Register (Address 0x09, Power-On Default = 0x00)
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TACH-DATA15 TACH-DATA14 TACH-DATA13 TACH-DATA12 TACH-DATA11 TACH-DATA10 TACH-DATA9
Bit 0 (LSB)
TACH-DATA8
Bits [TACH-DATA15:TACH-DATA0] are the number of clock pulses counted during one fan revolution and
represents the period of the fan revolution (refer to the Fan Speed Measurement section). Reading the TACH
data register involves a two-register read. The low byte should be read first. This method causes the high byte to
be frozen until both the high and low byte registers have been read from, preventing erroneous TACH readings.
TACH Setting Register
Bit 7 (MSB)
TACH-
SETTING7
TACH-SETTING-LByte Register (Address 0x1E, Power-On Default = 0xFF)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TACH-
SETTING6
TACH-
SETTING5
TACH-
SETTING4
TACH-
SETTING3
TACH-
SETTING2
TACH-
SETTING1
Bit 0 (LSB)
TACH-
SETTING0
Bit 7 (MSB)
TACH-
SETTING15
TACH-SETTING-HByte Register (Address 0x1F, Power-On Default = 0xFF)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TACH-
SETTING14
TACH-
SETTING13
TACH-
SETTING12
TACH-
SETTING11
TACH-
SETTING10
TACH-
SETTING9
Bit 0 (LSB)
TACH-
SETTING8
Bits [TACH-SETTING15:TACH-SETTING0] represent the period of the fan revolution (in the number of clock
pulses counted during one revolution), which is equal to the reciprocal of the target fan speed. Refer to the Fan
Speed Measurement section. Software writes this register to set the target RPM in the Software-RPM Control
mode. When the TACH-MODE bit (bit 1, 0x02) is cleared ('0'), the TACH setting must be not greater than the
value corresponding to the RPM for a 30% duty cycle. When the TACH mode is equal to '1', the TACH setting
must be not greater than the value corresponding to the allowed minimum RPM at which the fan properly runs.
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