AMC6821-Q1 Datasheet, PDF (31/54 Pages) Texas Instruments – INTELLIGENT TEMPERATURE MONITOR AND PWM FAN CONTROLLER

AMC6821-Q1
www.ti.com ...................................................................................................................................................................................................... SBAS475 – JUNE 2009
Once a limit is exceeded, the corresponding status bit is set to '1'. The status bit remains set until the error
condition subsides and the status register gets read. The status bits are referred to as being sticky because they
remain set until read by software. This design ensures that out-of-limit events cannot be missed if the software is
polling the device periodically. The SMBALERT output remains low for the entire duration that the reading is out
of limits and remains low until the status register has been read. This architecture has implications on how
software handles the interrupt.
High Limit
Temperature
Status Bit
Cleared on Read
(Temperature below limit)
SMBALERT
Temperature Back in Limit
(status bit stays set)
Figure 31. SMBALERT Pin and Status Bits Behavior
HANDLING SMBALERT INTERRUPTS
To prevent the system from being tied up while servicing interrupts, it is recommend to handle the SMBALERT
interrupt in this manner:
1. Detect the SMBALERT assertion.
2. Enter the interrupt handler.
3. Read the status registers to identify the interrupt source.
4. Disable the interrupt source by clearing the appropriate enable bit in the configuration registers.
5. Take the appropriate action for a given interrupt source.
6. Exit the interrupt handler.
7. Periodically poll the status registers. If the interrupt source bit has cleared, reset the corresponding interrupt
enable bit to '1'. This reset makes the SMBALERT output and status bits behave as shown in Figure 32.
High Limit
Temperature
Sticky Status Bit
Cleared on Read
(temperature below limit)
Temperature Back in Limit
(status bit stays set)
SMBALERT
Interrupt Disabled
Interrupt Enabled
(SMBALERT Rearmed)
Figure 32. How Masking the Interrupt Source Affects SMBALERT
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