AMC7832 Datasheet, PDF (47/70 Pages) Texas Instruments – AMC7832 12-Bit Analog Monitor and Control Solution with Multi-Channel ADC, Bipolar DACs, Temperature Sensor and GPIO Ports

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AMC7832
SLAS836 – MARCH 2014
Table 22. Register name: DAC Clear Enable 0 – Address: 0x18, Default: 0x00 (READ/WRITE)
REGISTER
NAME
DAC Clear
Enable 0
ADDRESS
0x18
BIT NAME
7
CLREN-C1
6
CLREN-C0
5
CLREN-B7
4
CLREN-B6
3
CLREN-A11
2
CLREN-A10
1
CLREN-A9
0
CLREN-A8
DESCRIPTION
This register determines which DACs go into clear state when a
clear event is detected as configured in the DAC-CLEAR-
SOURCE registers.
If CLRENn = '1', DAC_n is forced into a clear state with a clear
event.
If CLRENn = '0', a clear event does not affect the state of
DAC_n.
DEFAULT
VALUE
0
0
0
0
0
0
0
0
Table 23. Register name: DAC Clear Enable 1 – Address: 0x19, Default: 0x00 (READ/WRITE)
REGISTER
NAME
DAC Clear
Enable 1
ADDRESS
0x19
BIT NAME
7:4 Reserved
3
CLREN-D5
2
CLREN-D4
1
CLREN-D3
0
CLREN-D2
DESCRIPTION
Reserved for factory use
This register determines which DACs go into clear state when a
clear event is detected as configured in the DAC-CLEAR-
SOURCE registers.
If CLRENn = '1', DAC_n is forced into a clear state with a clear
event.
If CLRENn = '0', a clear event does not affect the state of
DAC_n.
DEFAULT
VALUE
All zeros
0
0
0
0
8.5.5 DAC Clear And ALARMOUT Source Select: Address 0x1A – 0x1D
Table 24. Register name: Register name: DAC Clear Source 0 – Address: 0x1A, Default: 0x00
(READ/WRITE)
REGISTER
NAME
DAC Clear
Source 0
ADDRESS
0x1A
BIT NAME
DESCRIPTION
DEFAULT
VALUE
7:5 Reserved
Reserved for factory use
000
4
ADC16-ALR-CLR This register selects which alarm forces DACs into a clear state,
0
3
ADC15-ALR-CLR
regardless of which DAC operation mode is active, auto or
manual. In order for DAC_n to go into clear mode, it must be
0
2
ADC14-ALR-CLR enabled in the DAC Clear Enable registers.
0
1
ADC13-ALR-CLR
0
0
ADC12-ALR-CLR
0
Table 25. Register name: Register name: DAC Clear Source 1 – Address: 0x1B, Default: 0x00
(READ/WRITE)
REGISTER
NAME
DAC Clear
Source 1
ADDRESS
0x1B
BIT NAME
DESCRIPTION
DEFAULT
VALUE
7:4 Reserved
Reserved for factory use
0000
3
ALARMIN-ALR This register selects which alarm forces DACs into a clear state,
0
2
THERM-ALR
regardless of which DAC operation mode is active, auto or
manual. In order for DAC_n to go into clear mode, it must be
0
1
LT-HIGH-ALR
enabled in the DAC Clear Enable registers.
0
0
LT-LOW-ALR
0
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