AMC7832 Datasheet, PDF (13/70 Pages) Texas Instruments – AMC7832 12-Bit Analog Monitor and Control Solution with Multi-Channel ADC, Bipolar DACs, Temperature Sensor and GPIO Ports

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AMC7832
SLAS836 – MARCH 2014
7.6 Timing Requirements - Serial Interface⁽¹⁾⁽²⁾
AV_DD = DV_DD = +4.5 to +5.5-V, AV_CC = +12-V, AV_EE = -12-V, AGND = DGND = AVSS_A,B,C,D = 0-V, DAC output range = 0 to
+10-V for all groups, no load on the DACs, T_A = -40°C to +105°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
IOVDD = +1.8-V to +2.7-V
f_SCLK SCLK frequency
t_P
SCLK period
t_PH
SCLK pulse width high
t_PL
SCLK pulse width low
t_SU
SDI setup
t_H
SDI hold
t_ODZ
SDO driven to tri-state
t_OZD
SDO tri-state to driven
t_OD
SDO output delay
t_CSS
CS setup
t_CSH
CS hold
t_IAG
Inter-access gap
IOVDD = +2.7-V to +5.5-V
66.67
27
27
10
10
0
0
0
5
20
10
15 MHz
ns
ns
ns
ns
ns
15 ns
20 ns
20 ns
ns
ns
ns
f_SCLK
t_P
t_PH
t_PL
t_SU
t_H
t_ODZ
t_OZD
t_OD
t_CSS
t_CSH
t_IAG
SCLK frequency
SCLK period
SCLK pulse width high
SCLK pulse width low
SDI setup
SDI hold
SDO driven to tri-state
SDO tri-state to driven
SDO output delay
CS setup
CS hold
Inter-access gap
20 MHz
50
ns
22.5
ns
20
ns
10
ns
10
ns
0
9 ns
0
12 ns
0
15 ns
5
ns
20
ns
10
ns
(1) Specified by design and characterization. Not tested during production.
(2) SDO loaded with 10-pF load capacitance for SDO timing specifications.
Copyright © 2014, Texas Instruments Incorporated
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