ADS54J60 Datasheet, PDF (47/76 Pages) Texas Instruments – Dual-Channel, 16-Bit, 1.0-GSPS Analog-to-Digital Converter

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7.5.2.2.7 Register 53h (address = 53h), Master Page (080h)
ADS54J60
SBAS706B – APRIL 2015 – REVISED AUGUST 2015
Figure 90. Register 53h
7
6
5
4
0
MASK
SYSREF
0
0
W-0h
R/W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
3
0
W-0h
2
0
W-0h
1
EN SYSREF
DC COUPLING
R/W-0h
0
0
W-0h
Table 30. Register 53h Field Descriptions
Bit Field
7
0
6
MASK SYSREF
5-2 0
1
EN SYSREF DC COUPLING
0
0
Type
W
R/W
W
R/W
Reset
0h
0h
0h
0h
W
0h
Description
Must write 0
0 = Normal operation
1 = Ignores the SYSREF input
Must write 0
Enables higher common mode voltage input on SYSREF signal
(up to 1.6 V).
0 = Normal operation
1 = Enables higher SYSREF common mode voltage support
Must write 0
7.5.2.2.8 Register 55h (address = 55h), Master Page (080h)
Figure 91. Register 55h
7
6
5
4
0
0
0
PDN MASK
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
3
0
W-0h
2
0
W-0h
1
0
W-0h
0
0
W-0h
Bit Field
7-5 0
4
PDN MASK
3-0 0
Table 31. Register 55h Field Descriptions
Type
W
R/W
Reset
0h
0h
W
0h
Description
Must write 0
This bit enables power-down via a register bit.
0 = Normal operation
1 = Power-down is enabled by powering down internal blocks as
specified in the selected power-down mask
Must write 0
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