ADS54J60 Datasheet, PDF (23/76 Pages) Texas Instruments – Dual-Channel, 16-Bit, 1.0-GSPS Analog-to-Digital Converter

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ADS54J60
SBAS706B – APRIL 2015 – REVISED AUGUST 2015
7.3 Feature Description
7.3.1 Analog Inputs
The ADS54J60 analog signal inputs are designed to be driven differentially. The analog input pins have internal
analog buffers that drive the sampling circuit. As a result of the analog buffer, the input pins present a high
impedance input across a very wide frequency range to the external driving source, which enables great flexibility
in the external analog filter design as well as excellent 50-Ω matching for RF applications. The buffer also helps
isolate the external driving circuit from the internal switching currents of the sampling circuit, resulting in a more
constant SFDR performance across input frequencies.
The common-mode voltage of the signal inputs is internally biased to VCM using 600-Ω resistors, allowing for ac-
coupling of the input drive network. Each input pin (INP, INM) must swing symmetrically between (VCM +
0.475 V) and (VCM – 0.475 V), resulting in a 1.9-V_PP (default) differential input swing. The input sampling circuit
has a 3-dB bandwidth that extends up to 1.2 GHz. An equivalent analog input network diagram is shown in
Figure 55.
2 nH
INP
500 fF
0.6 :
150 fF
0.77 :
150 fF
1:
200 fF
3.3 :
3 pF
40 :
375 fF
600 :
VCM
600 :
2 nH
INM
500 fF
0.6 :
150 fF
0.77 :
150 fF
1:
200 fF
0.77 :
150 fF
1:
200 fF
3.3 :
3 pF
40 :
375 fF
3.3 :
3 pF
40 :
375 fF
0.77 :
150 fF
1:
200 fF
3.3 :
3 pF
40 :
375 fF
Figure 55. Analog Input Network
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