LM3S317 Datasheet, PDF(462/551 Page) List of Unclassifed Manufacturers – Microcontroller

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LM3S317 Datasheet, PDF (462/551 Pages) List of Unclassifed Manufacturers – Microcontroller

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Pulse Width Modulator (PWM)

period. Use this value to set the PWM0LOAD register. In Count-Down mode, set the Load field

in the PWM0LOAD register to the requested period minus one.

â Write the PWM0LOAD register with a value of 0x0000.018F.

6. Set the pulse width of the PWM0 pin for a 25% duty cycle.

â Write the PWM0CMPA register with a value of 0x0000.012B.

7. Set the pulse width of the PWM1 pin for a 75% duty cycle.

â Write the PWM0CMPB register with a value of 0x0000.0063.

8. Start the timers in PWM generator 0.

â Write the PWM0CTL register with a value of 0x0000.0001.

9. Enable PWM outputs.

â Write the PWMENABLE register with a value of 0x0000.0003.

14.5

Register Map

Table 14-2 on page 462 lists the PWM registers. The offset listed is a hexadecimal increment to the

registerâs address, relative to the PWM base address of 0x4002.8000. Note that the PWM module

clock must be enabled before the registers can be programmed (see page 190). There must be a

delay of 3 system clocks after the PWM module clock is enabled before any PWM module registers

are accessed.

Table 14-2. PWM Register Map

Offset Name

Type

0x000 PWMCTL

0x004 PWMSYNC

0x008 PWMENABLE

0x00C PWMINVERT

0x010 PWMFAULT

0x014 PWMINTEN

0x018 PWMRIS

0x01C PWMISC

0x020 PWMSTATUS

0x040 PWM0CTL

0x044 PWM0INTEN

0x048 PWM0RIS

0x04C PWM0ISC

0x050 PWM0LOAD

R/W

R/W

R/W

R/W

R/W

R/W

RO

R/W1C

RO

R/W

R/W

RO

R/W1C

R/W

Reset

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

0x0000.0000

Description

PWM Master Control

PWM Time Base Sync

PWM Output Enable

PWM Output Inversion

PWM Output Fault

PWM Interrupt Enable

PWM Raw Interrupt Status

PWM Interrupt Status and Clear

PWM Status

PWM0 Control

PWM0 Interrupt and Trigger Enable

PWM0 Raw Interrupt Status

PWM0 Interrupt Status and Clear

PWM0 Load

See

page

465

466

467

468

469

470

471

472

473

474

476

479

480

481

462

July 14, 2014

Texas Instruments-Production Data

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