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LM3S317 Datasheet, PDF (21/551 Pages) List of Unclassifed Manufacturers – Microcontroller | |||
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Stellaris® LM3S317 Microcontroller
Table 1. Revision History (continued)
Date
January 2011
Revision
9102
Description
â In Application Interrupt and Reset Control (APINT) register, changed bit name from SYSRESETREQ
to SYSRESREQ.
â Added DEBUG (Debug Priority) bit field to System Handler Priority 3 (SYSPRI3) register.
â Added "Reset Sources" table to System Control chapter.
â Removed mention of false-start bit detection in the UART chapter. This feature is not supported.
â Added note that specific module clocks must be enabled before that module's registers can be
programmed. There must be a delay of 3 system clocks after the module clock is enabled before
any of that module's registers are accessed.
â Corrected nonlinearity and offset error parameters (EL, ED, and EO) in ADC Characteristics table.
â Added specification for maximum input voltage on a non-power pin when the microcontroller is
unpowered (VNON parameter in Maximum Ratings table).
â Additional minor data sheet clarifications and corrections.
September 2010
7783
â Reorganized ARM Cortex-M3 Processor Core, Memory Map and Interrupts chapters, creating two
new chapters, The Cortex-M3 Processor and Cortex-M3 Peripherals. Much additional content was
added, including all the Cortex-M3 registers.
â Changed register names to be consistent with StellarisWare® names: the Cortex-M3 Interrupt
Control and Status (ICSR) register to the Interrupt Control and State (INTCTRL) register, and
the Cortex-M3 Interrupt Set Enable (SETNA) register to the Interrupt 0-31 Set Enable (EN0)
register.
â Added clarification of instruction execution during Flash operations.
â Modified Figure 7-2 on page 232 to clarify operation of the GPIO inputs when used as an alternate
function.
â Added caution not to apply a Low value to PB7 when debugging; a Low value on the pin causes
the JTAG controller to be reset, resulting in a loss of JTAG communication.
â In General-Purpose Timers chapter, clarified operation of the 32-bit RTC mode.
â Added missing table "Connections for Unused Signals" (Table 16-5 on page 502).
â In Electrical Characteristics chapter:
â Added ILKG parameter (GPIO input leakage current) to Table 18-4 on page 505.
â Corrected values for tCLKRF parameter (SSIClk rise/fall time) in Table 18-16 on page 513.
â Added dimensions for Tray and Tape and Reel shipping mediums.
June 2010
7393
â Corrected base address for SRAM in architectural overview chapter.
â Clarified system clock operation, adding content to âClock Controlâ on page 158.
â In Signal Tables chapter, added table "Connections for Unused Signals."
â In "Reset Characteristics" table, corrected value for supply voltage (VDD) rise time.
â Additional minor data sheet clarifications and corrections.
July 14, 2014
21
Texas Instruments-Production Data
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