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THS4532_16 Datasheet, PDF (46/58 Pages) Texas Instruments – Ultra Low Power, Rail-to-Rail Output, Fully-Differential Amplifier
THS4532
SLOS829A – FEBRUARY 2013 – REVISED JULY 2015
www.ti.com
Systems Examples (continued)
After the feedback resistor values are chosen, the aim is to solve for the RT (a termination resistor to ground on
the signal input side), RG1 (the input gain resistor for the signal path), and RG2 (the matching gain resistor on the
nonsignal input side); see Figure 98 and Figure 99. The same resistor solutions can be applied to either AC- or
DC-coupled paths. Adding blocking capacitors in the input-signal chain is a simple option. Adding these blocking
capacitors after the RT element (as shown in Figure 98) has the advantage of removing any DC currents in the
feedback path from the output VOCM to ground.
Earlier approaches to the solutions for RT and RG1 (when the input must be matched to a source impedance, RS)
follow an iterative approach. This complexity arises from the active input impedance at the RG1 input. When the
FDA is used to convert a single-ended signal to differential, the common-mode input voltage at the FDA inputs
must move with the input signal to generate the inverted output signal as a current in the RG2 element. A more
recent solution is shown as Equation 8, where a quadratic in RT can be solved for an exact value. This quadratic
emerges from the simultaneous solution for a matched input impedance and target gain. The only inputs required
are:
• The selected RF value.
• The target voltage gain (Av) from the input of RT to the differential output voltage.
• The desired input impedance at the junction of RT and RG1 to match RS.
Solving this quadratic for RT starts the solution sequence, as shown in Equation 8:
R
2
T
-
R
T
2R S(2R F
2R F(2 + AV ) -
+
RS
2
A
2
V
)
R SAV(4 +
AV )
-
2R F(2 +
2R F RS2 AV
AV ) - R SAV(4 + AV)
=0
(8)
Being a quadratic, there are limits to the range of solutions. Specifically, after RF and RS are chosen, there is
physically a maximum gain beyond which Equation 8 starts to solve for negative RT values (if input matching is a
requirement). With RF selected, use Equation 9 to verify that the maximum gain is greater than the desired gain.
é
ù
ê
A V(MAX)
=
æ
ççè
R
R
F
S
ö
- 2÷÷ø ´
ê
êê1 +
ê
êë
1
+
4RF
RS
æ
ççè
R
R
F
S
ö2
- 2÷÷ø
ú
ú
ú
ú
ú
úû
(9)
If the achievable AV(MAX) is less than desired, increase the RF value. After RT is derived from Equation 8, the RG1
element is given by Equation 10:
R G1
=
2RF
AV
1+
- RS
RS
RT
(10)
Then, the simplest approach is to use a single RG2 = RT || RS + RG1 on the nonsignal input side. Often, this
approach is shown as the separate RG1 and RS elements. Using these separate elements provides a better
divider match on the two feedback paths, but a single RG2 is often acceptable. A direct solution for RG2 is given
as Equation 11:
2RF
R G2
=
AV
1+
RS
RT
(11)
This design proceeds from a target input impedance matched to RS, signal gain Av from the matched input to the
differential output voltage, and a selected RF value. The nominal RF value chosen for the THS5432 family
characterization is 2 kΩ. As discussed previously, going lower improves noise and phase margin, but reduces the
total output load impedance possibly degrading harmonic distortion. Going higher increases the output noise, and
might reduce the loop-phase margin because of the feedback pole to the input capacitance, but reduces the total
loading on the outputs.
46
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