CC3120 Datasheet, PDF (46/57 Pages) Texas Instruments – SimpleLink Wi-Fi Wireless Network Processor Internet-of-Things Solution for MCU Applications

CC3120
SWAS034 – FEBRUARY 2017
Figure 6-3 shows the ground routing for the input decoupling capacitors.
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Figure 6-3. Ground Routing for the Input Decoupling Capacitors
The ground return for the input capacitors are routed on L2 to reduce the EMI and improve the spectral
mask. This routing must be strictly followed because it is critical for the overall performance of the device.
6.2.3 Clock Interfaces
The following guidelines are for the slow clock.
• The 32.768-kHz crystal must be placed close to the QFN package.
• Ensure that the load capacitance is tuned according to the board parasitics to the frequency tolerance
is within ±150 ppm.
• The ground plane on layer two is solid below the trace lanes and there is ground around these traces
on the top layer.
The following guidelines are for the fast clock.
• The 40-MHz crystal must be placed close to the QFN package.
• Ensure that he load capacitance is tuned according to the board parasitics to the frequency tolerance
is within ±100 ppm at room temperature. The total frequency across parts, temperature, and with
aging, must be ±25 ppm to meet the WLAN specification.
• Ensure that no high-frequency lines are routed close to the XTAL routing to avoid noise degradation.
• Ensure that crystal tuning capacitors are close to the crystal pads.
• Make both traces (XTALM and XTALP) as close to parallel as possible and approximately the same
length.
• The ground plane on layer two is solid below the trace lines and that there is ground around these
traces on the top layer.
• See CC31xx & CC32xx Frequency Tuning for frequency tuning.
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