MSP430F532X Datasheet, PDF (43/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F532x
www.ti.com
SLAS678D – AUGUST 2010 – REVISED FEBRUARY 2013
Low-Power Mode Supply Currents (Into V_CC) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)^{(1) (2)}
PARAMETER
-40 °C
25 °C
60 °C
85°C
V_CC PMMCOREVx _{TYP MAX TYP MAX TYP MAX TYP MAX} UNIT
I_LPM0,1MHz Low-power mode 0 ^{(3) (4)}
2.2 V
3V
0
3
73
79
77
85
80
83
92
88
85
97
µA
95 105
I_LPM2
Low-power mode 2^{(5) (4)}
2.2 V
3V
0
3
6.5
7.0
6.5
12
10
7.0
13
11
11
17
µA
12
18
0
1.60
1.90
2.6
5.6
2.2 V
1
1.65
2.00
2.7
5.9
2
I_LPM3,XT1LF
Low-power mode 3,
crystal mode^{(6) (4)}
0
1
3V
2
1.75
1.8
1.9
2.0
2.15
2.9
2.1 2.9 2.8
2.3
2.9
2.4
3.0
6.1
5.8 8.3 µA
6.1
6.3
3
2.0
2.5 3.9 3.1
6.4 9.3
0
1.1
1.4 2.7 1.9
4.9 7.4
I_LPM3,VLO
Low-power mode 3,
VLO mode^{(7) (4)}
3V
1
2
1.1
1.2
1.4
1.5
2.0
5.2
µA
2.1
5.3
3
1.3
1.6 3.0 2.2
5.4 8.5
0
0.9
1.1 1.5 1.8
4.8 7.3
I_LPM4
Low-power mode 4^{(8) (4)} 3 V
1
2
1.1
1.2
1.2
1.2
2.0
5.1
µA
2.1
5.2
3
I_LPM4.5
Low-power mode 4.5⁽⁹⁾
3V
1.3
0.15
1.3 1.6 2.2
0.18 0.35 0.26
5.3 8.1
0.5 1.0 µA
(1) All inputs are tied to 0 V or to V_CC. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 1 MHz
LDO disabled (LDOEN = 0).
(4) Current for brownout, high side supervisor (SVS_H) normal mode included. Low side supervisor and monitors disabled (SVS_L, SVM_L).
High side monitor disabled (SVM_H). RAM retention enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); f_ACLK = 32768 Hz, f_MCLK = 0 MHz, f_SMCLK = f_DCO = 0 MHz; DCO setting
= 1 MHz operation, DCO bias generator enabled.)
LDO disabled (LDOEN = 0).
(6) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = 32768 Hz, f_MCLK = f_SMCLK = f_DCO = 0 MHz
LDO disabled (LDOEN = 0).
(7) Current for watchdog timer and RTC clocked by ACLK included. ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f_ACLK = f_VLO, f_MCLK = f_SMCLK = f_DCO = 0 MHz
LDO disabled (LDOEN = 0).
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f_DCO = f_ACLK = f_MCLK = f_SMCLK = 0 MHz
LDO disabled (LDOEN = 0).
(9) Internal regulator disabled. No data retention.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1, PMMREGOFF = 1 (LPM4.5); f_DCO = f_ACLK = f_MCLK = f_SMCLK = 0 MHz
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