MSP430F532X Datasheet, PDF (12/106 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F532x
SLAS678D – AUGUST 2010 – REVISED FEBRUARY 2013
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Table 3. Terminal Functions (continued)
TERMINAL
NAME
PN
NO.
RGC
ZQE
I/O ⁽¹⁾
DESCRIPTION
TEST/SBWTCK ⁽³⁾
71
59
A4
I ^{Test mode pin – Selects four wire JTAG operation.}
Spy-Bi-Wire input clock when Spy-Bi-Wire operation activated
PJ.0/TDO ⁽⁴⁾
72
60
C5
I/O ^{General-purpose digital I/O}
JTAG test data output port
PJ.1/TDI/TCLK ⁽⁴⁾
73
61
C4
I/O ^{General-purpose digital I/O}
JTAG test data input or test clock input
PJ.2/TMS ⁽⁴⁾
74
62
A3
I/O ^{General-purpose digital I/O}
JTAG test mode select
PJ.3/TCK ⁽⁴⁾
75
63
B3
I/O ^{General-purpose digital I/O}
JTAG test clock
RST/NMI/SBWTDIO ⁽³⁾
Reset input active low
76
64
A2
I/O _{Non-maskable interrupt input}
Spy-Bi-Wire data input/output when Spy-Bi-Wire operation activated.
P6.0/CB0/A0
General-purpose digital I/O
77
1
A1
I/O _{Comparator_B input CB0}
Analog input A0 – ADC
P6.1/CB1/A1
General-purpose digital I/O
78
2
B2
I/O _{Comparator_B input CB1}
Analog input A1 – ADC
P6.2/CB2/A2
General-purpose digital I/O
79
3
B1
I/O _{Comparator_B input CB2}
Analog input A2 – ADC
P6.3/CB3/A3
Reserved
General-purpose digital I/O
80
4
C2
I/O _{Comparator_B input CB3}
Analog input A3 – ADC
N/A N/A
(5)
(3) See Bootstrap Loader (BSL) and JTAG Operation for use with BSL and JTAG functions
(4) See JTAG Operation for usage with JTAG function.
(5) C6, D4, D5, D6, E3, E4, E5, E6, F3, F4, F5, F6, F7, F8, G3 are reserved and should be connected to ground.
12
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