LP38691-ADJ_16 Datasheet, PDF (4/27 Pages) Texas Instruments – 500-mA Low-Dropout CMOS Linear Regulators Stable

LP38691-ADJ, LP38693-ADJ, LP38691-ADJ-Q1, LP38693-ADJ-Q1
SNVS324K – JANUARY 2005 – REVISED JANUARY 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾
V_(MAX) All pins (with respect to GND)
I_OUT ⁽³⁾
Power dissipation⁽⁴⁾
Junction temperature
Storage temperature, T_stg
MIN
MAX
–0.3
12
Internally limited
Internally limited
–40
150
−65
150
UNIT
V
V
V
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) If used in a dual-supply system where the regulator load is returned to a negative supply, the OUT pin must be diode clamped to
ground.
(4) At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a
heatsink is used). When using the WSON package, refer to Leadless Leadframe Package (LLP) (SNOA401) and the WSON Mounting
section in this data sheet. If power dissipation causes the junction temperature to exceed specified limits, the device will go into thermal
shutdown.
6.2 ESD Ratings: LP38691-ADJ, LP38693-ADJ
V_(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾
VALUE
±2000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 ESD Ratings: LP38691-ADJ-Q1, LP38693-ADJ-Q1
V_(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002⁽¹⁾
VALUE
2000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
UNIT
V
6.4 Recommended Operating Conditions
V_IN supply voltage
Operating junction temperature
MIN
NOM
MAX UNIT
2.7
10
V
−40
125
°C
6.5 Thermal Information
THERMAL METRIC⁽¹⁾
LP3869x-ADJ
WSON
LP38693-ADJ
SOT-223
UNIT
R_θJA ⁽²⁾
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance, High-K
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
6 PINS
50.6
44.4
24.9
0.4
25.1
5.4
5 PINS
68.5 ⁽³⁾
52.2
13.0
5.5
12.8
n/a
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(2) Thermal resistance value R_θJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal
Conductivity Test Board for Leaded Surface Mount Packages.
(3) The PCB for the WSON (NGN) package R_θJA includes thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.
4
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