LP38691-ADJ_16 Datasheet, PDF (16/27 Pages) Texas Instruments – 500-mA Low-Dropout CMOS Linear Regulators Stable

LP38691-ADJ, LP38693-ADJ, LP38691-ADJ-Q1, LP38693-ADJ-Q1
SNVS324K – JANUARY 2005 – REVISED JANUARY 2016
www.ti.com
On the WSON (DRV) package, the primary conduction path for heat is through the exposed power pad to the
PCB. To ensure the device does not overheat, connect the exposed pad, through thermal vias, to an internal
ground plane with an appropriate amount of copper PCB area .
On the VSSOP (DGK) and SOT-223 (NDC) packages, the primary conduction path for heat is through the pins to
the PCB.
The maximum allowable junction temperature (T_J(MAX)) determines maximum power dissipation allowed (P_D(MAX))
for the device package.
Power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance
(R_θJA) of the combined PCB and device package and the temperature of the ambient air (T_A), according to
Equation 3 or Equation 4:
T_J(MAX) = T_A(MAX) + (R_θJA × P_D(MAX))
(3)
P_D(MAX) = (T_J(MAX) - T_A(MAX)) / R_θJA
(4)
Unfortunately, this R_θJA is highly dependent on the heat-spreading capability of the particular PCB design, and
therefore varies according to the total copper area, copper weight, and location of the planes. The R_θJA recorded
in Thermal Information is determined by the specific EIA/JEDEC JESD51-7 standard for PCB and copper-
spreading area, and is to be used only as a relative measure of package thermal performance. For a well-
designed thermal layout, R_θJA is actually the sum of the package junction-to-case (bottom) thermal resistance
(R_θJCbot) plus the thermal resistance contribution by the PCB copper area acting as a heat sink.
8.2.2.9 Estimating Junction Temperature
The EIA/JEDEC standard recommends the use of psi (Ψ) thermal characteristics to estimate the junction
temperatures of surface mount devices on a typical PCB board application. These characteristics are not true
thermal resistance values, but rather package specific thermal characteristics that offer practical and relative
means of estimating junction temperatures. These psi metrics are determined to be significantly independent of
copper-spreading area. The key thermal characteristics (Ψ_JT and Ψ_JB) are given in Thermal Information and are
used in accordance with Equation 5 or Equation 6.
T_J(MAX) = T_TOP + (Ψ_JT × P_D(MAX))
where
• P_D(MAX) is explained in Equation 2.
• T_TOP is the temperature measured at the center-top of the device package.
(5)
T_J(MAX) = T_BOARD + (Ψ_JB × P_D(MAX))
where
• P_D(MAX) is explained in Equation 2.
• T_BOARD is the PCB surface temperature measured 1-mm from the device package and centered on the
package edge.
(6)
For more information about the thermal characteristics Ψ_JT and Ψ_JB, see the TI Application Report
Semiconductor and IC Package Thermal Metrics (SPRA953), available for download at www.ti.com.
For more information about measuring T_TOP and T_BOARD, see the TI Application Report Using New Thermal
Metrics (SBVA025), available for download at www.ti.com.
For more information about the EIA/JEDEC JESD51 PCB used for validating R_θJA, see the TI Application Report
Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017), available for
download at www.ti.com.
16
Submit Documentation Feedback
Copyright © 2005–2016, Texas Instruments Incorporated
Product Folder Links: LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1