LP38691-ADJ_16 Datasheet, PDF (18/27 Pages) Texas Instruments – 500-mA Low-Dropout CMOS Linear Regulators Stable

LP38691-ADJ, LP38693-ADJ, LP38691-ADJ-Q1, LP38693-ADJ-Q1
SNVS324K – JANUARY 2005 – REVISED JANUARY 2016
www.ti.com
9 Power Supply Recommendations
The LP3869x-ADJ devices are designed to operate from an input supply voltage range of 2.7 V to 10 V. The
input supply should be well regulated and free of spurious noise. To ensure that the device output voltage is well
regulated, input supply should be at least V_OUT + 0.5 V, or 2.7 V, whichever is higher. A minimum capacitor value
of 1-μF is required to be within 1 cm of the IN pin.
10 Layout
10.1 Layout Guidelines
Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.
The input and output capacitors must be directly connected to the input, output, and ground pins of the regulator
using traces which do not have other currents flowing in them (Kelvin connect).
The best way to do this is to lay out C_IN and C_OUT near the device with short traces to the IN, OUT, and GND
pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its
capacitors have a "single point ground."
It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane
were used at the ground points of the device and the input and output capacitors. This was caused by varying
ground potentials at these nodes resulting from current flowing through the ground plane. Using a single point
ground technique for the regulator and its capacitors fixed the problem. Because high current flows through the
traces going into V_IN and coming from V_OUT, Kelvin connect the capacitor leads to these pins so there is no
voltage drop in series with the input and output capacitors.
10.2 Layout Examples
VIA connect to ground
layer
GND
R2
R1
C_OUT
VIA connect to
ground layer
IN ₁
8 IN
C_IN
GND 2
Exposed Pad
on Bottom
7 _OUT
(DAP)
C_OUT
C_IN
EN 3
R1
6 ADJ
R2
Figure 31. SOT-223 Layout
Figure 32. WSON LP38693 Layout
18
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