DDC118_16 Datasheet, PDF (4/36 Pages) Texas Instruments – Octal Current Input, 20-Bit Analog-To-Digital Converter

DDC118
SBAS325B − JUNE 2004 − REVISED APRIL 2009
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At TA = +25°C, AVDD = +5V, DVDD = 3V, VREF = +4.096V, Range 5 (250pC), and continuous mode operation, unless otherwise noted.
Low-Power Mode: TINT = 400µs and CLK = 4MHz; High-Speed Mode: TINT = 320µs and CLK = 4.8MHz.
Low-Power Mode
High-Speed Mode
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN TYP MAX
UNITS
DIGITAL INPUT/OUTPUT
Logic Levels
V_IH
V_IL
V_OH
V_OL
Input Current (I_IN)
Data Format⁽¹²⁾
I_OH = −500µA
I_OL = 500µA
0 < V_IN < DVDD
0.8DVDD
− 0.1
DVDD + 0.1 ∗
0.2DVDD
∗
∗
V
∗
V
DVDD − 0.4
0.4
±10
Straight Binary
V
∗
V
∗
µA
∗
POWER-SUPPLY REQUIREMENTS
Analog Power-Supply Voltage (AVDD)
Digital Power-Supply Voltage (DVDD)
Supply Current
Total Analog Current
Total Digital Current
Total Power Dissipation
Total Power Dissipation per Channel
DVDD = +3V
DVDD = +3V
DVDD = +3V
4.75
5.25
∗
∗
V
2.7
5.25
∗
∗
V
21
1
108
150
13.5
18.75
28
mA
1.34
mA
144 200
mW
18
25
mW
(1) _{∗ indicates that specification is the same as Low-Power Mode.}
(2) _{Exceeding maximum input current specification may damage device.}
(3) _{Input is less than 1% of full scale.}
(4) _{CSENSOR is the capacitance seen at the DDC118 inputs from wiring, photodiode, etc.}
(5) _{FSR is Full-Scale Range.}
(6) _{A best-fit line is used in measuring nonlinearity.}
(7) _{Matching between side A and side B of the same input.}
(8) _{Ensured by design, not production tested.}
(9) _{Voltage produced by the DDC118 at its input which is applied to the sensor.}
(10)Range _{drift does not include external reference drift.}
(11)Input _{reference current decreases with increasing TINT (see the Voltage Reference section, page 11).}
(12)Data _{format is Straight Binary with a small offset. The number of bits in the output word is controlled by the FORMAT pin (see text).}
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