BQ4802LYPW Datasheet, PDF (4/26 Pages) Texas Instruments – PARALLEL REAL-TIME CLOCK WITH CPU SUPERVISOR AND EXTERNAL SRAM NONVOLATILE MEMORY BACKUP

bq4802Y
bq4802LY
SLUS464C – AUGUST 2000 – REVISED JUNE 2002
www.ti.com
AC TEST CONDITIONS, INPUT PULSE LEVELS V_I = 0 V to 3.0 V, t_R = t_F = 5 NS, VREF = 1.5 V
3V
3V
962 Ω
962 Ω
DOUT
DOUT
510 Ω
100 pF
510 Ω
5 pF
Figure 1. Output Load A
OPERATING CHARACTERISTICS
READ CYCLE (T_A = T_OPR, V_CC = 5 V)
PARAMETER
tRC
tAA
tACS
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Chip select to output low Z
Output enable until output low Z
Output enable until output high Z
Output disable until output high Z
Output hold from address change
READ CYCLE (T_A = T_OPR, V_CC = 3.3 V)
PARAMETER
tRC
tAA
tACS
tOE
tCLZ
tOHL
tCLH
tOLZ
tOH
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Chip select to output low Z
Output enable until output low Z
Output enable until output high Z
Output disable until output high Z
Output hold from address change
Figure 2. Output Load B
TEST CONDITIONS
Output load A
Output load A
Output load A
Output load B
Output load B
Output load B
Output load B
Output load A
TEST CONDITIONS
Output load A
Output load A
Output load A
Output load B
Output load B
Output load B
Output load B
Output load A
MIN
200
8
0
0
0
10
MAX
100
100
100
45
45
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
MIN
300
15
0
0
0
18
MAX
150
150
150
60
60
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
4