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BQ2084DBTR-V150 Datasheet, PDF (4/69 Pages) Texas Instruments – SBS v1.1-COMPLIANT GAS GAUGE WITH LED DELAY
bq2084-V150
SLUS758 – JUNE 2007
www.ti.com
PLL SWITCHING CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –20°C to 85°C unless otherwise noted
PARAMETER
t(SP)
Start-up time (1)
TEST CONDITIONS
±0.5% frequency error
MIN TYP MAX UNIT
2 5 ms
(1) The frequency error is measured from the trimmed frequency of the internal system clock, which is 128 x oscillator frequency, nominally
4.194 MHz.
OSCILLATOR
VDD = 3 V to 3.6 V, TA = –20°C to 85°C (unless otherwise noted) (TYP: VDD = 3.3 V, TA = 25°C)
PARAMETER
TEST CONDITIONS
MIN
f(eio) Frequency error from 32.768 kHz
f(dio)
f(sio)
f(sxo)
Frequency drift(1)
Start-up time(2)
ROSC = 100k
XCK1 = 12 pF XTAL
ROSC = 100k, TA = 0°C to 50°C
ROSC = 100k
XCK1 = 12 pF XTAL
–2%
–0.25%
–1%
(1) The frequency drift is measured from the trimmed frequency at VDD = 3.3 V, TA = 25°C.
(2) The start-up time is defined as the time it takes for the oscillator output frequency to be ±1%
TYP
0.5%
MAX
2%
0.25%
1%
200
250
UNIT
µs
ms
DATA FLASH MEMORY CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –20°C to 85°C unless otherwise noted
tDR
t(WORDPROG)
I(DDPROG)
PARAMETER
Data retention
Flash programming write-cycles
Word programming time
Flash-write supply current
TEST CONDITIONS
See (1)
See (1)
See (1)
See (1)
(1) Specified by design. Not production tested.
MIN TYP
10
20k
8
MAX UNIT
Years
Cycles
2 ms
12 mA
REGISTER BACKUP
I(RBI)
V(RBI)
PARAMETER
RBI data-retention input current
RBI data-retention voltage (1)
(1) Specified by design. Not production tested.
TEST CONDITIONS
VRBI > 2 V, VDD < VIT
SMBus TIMING SPECIFICATIONS
VDD = 3 V to 3.6 V, TA = -20°C to 85°C unless otherwise noted
PARAMETER
TEST CONDITIONS
f(SMB)
f(MAS)
t(BUF)
T(HD:STA)
t(SU:STA)
t(SU:STO)
t(HD:DAT)
SMBus operating frequency
SMBus master clock frequency
Bus free time between start and stop
Hold time after (repeated) start
Repeated start setup time
Stop setup time
Data hold time
Slave mode, SMBC 50% duty cycle
Master mode, no clock low slave extend
Receive mode
Transmit mode
tSU:DAT)
t(TIMEOUT)
t(LOW)
Data setup time
Error signal/detect
Clock low period
See (1)
(1) The bq2084-V150 times out when any clock low exceeds t(TIMEOUT).
4
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MIN TYP
10
1.3
MAX
100
UNIT
nA
V
MIN TYP MAX
10
100
51.2
4.7
4
4.7
4
0
300
250
25
35
4.7
UNIT
kHz
kHz
µs
µs
µs
µs
ns
ns
ms
µs