AM5728 Datasheet, PDF (391/415 Pages) Texas Instruments – AM572x Sitara™ Processors

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AM5728, AM5726
SPRS953A – DECEMBER 2015 – REVISED JUNE 2016
Rtt
A2
A3
A4
A3
AT
Vtt
=
Figure 8-11. ADDR_CTRL Routing for Four Mirrored DDR3 Devices
8.2.2.15.2 Two DDR3 Devices
Two DDR3 devices are supported on the DDR EMIF consisting of two x8 DDR3 devices arranged as one
bank (CS), 16 bits wide, or two x16 DDR3 devices arranged as one bank (CS), 32 bits wide. These two
devices may be mounted on a single side of the PCB, or may be mirrored in a pair to save board space at
a cost of increased routing complexity and parts on the backside of the PCB.
8.2.2.15.2.1 CK and ADDR_CTRL Topologies, Two DDR3 Devices
Figure 8-12 shows the topology of the CK net classes and Figure 8-13 shows the topology for the
corresponding ADDR_CTRL net classes.
DDR Differential CK Input Buffers
+–
+–
Processor
+
Differential Clock
Output Buffer
–
Clock Parallel
Terminator
Rcp
DDR_1V5
A1
A2
A3
AT
Cac
Rcp
0.1 µF
A1
A2
A3
AT
Routed as Differential Pair
Figure 8-12. CK Topology for Two DDR3 Devices
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Applications, Implementation, and Layout 391
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