AM5728 Datasheet, PDF (313/415 Pages) Texas Instruments – AM572x Sitara™ Processors

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AM5728, AM5726
SPRS953A – DECEMBER 2015 – REVISED JUNE 2016
NO.
RMII6
Table 7-75. Timing Requirements for GMAC RMIIn Receive (continued)
PARAMETER
t_{h(REF_CLK-RXD)}
t_{h(REF_CLK-CRS_DV)}
t_{h(REF_CLK-RX_ER)}
DESCRIPTION
Hold time, receive selected signals valid after REF_CLK
MIN
2
MAX UNIT
ns
REF_CLK (PRCM)
RMII4
RMII3
RMII1
RMII2
RMII5
RMII6
rmiin_rxd1−rmiin_rxd0,
rmiin_crs, rmin_rxer (inputs)
Figure 7-57. GMAC Receive Interface Timing RMIIn operation
SPRS8xx_GMAC_RMIIRX_05
Table 7-76, Table 7-76 and Figure 7-58 present switching characteristics for GMAC RMIIn Transmit
10/100Mbit/s.
Table 7-76. Switching Characteristics Over Recommended Operating Conditions for GMAC REF_CLK -
RMII Operation
NO.
RMII7
RMII8
RMII9
RMII10
PARAMETER
t_{c(REF_CLK)}
t_{w(REF_CLKH)}
t_{w(REF_CLKL)}
t_{t(REF_CLK)}
DESCRIPTION
Cycle time, REF_CLK
Pulse duration, REF_CLK high
Pulse duration, REF_CLK low
Transistion time, REF_CLK
MIN
MAX UNIT
20
ns
7
13 ns
7
13 ns
3 ns
Table 7-77. Switching Characteristics Over Recommended Operating Conditions for GMAC RMIIn
Transmit 10/100 Mbits/s
NO.
RMII11
PARAMETER
t_{d(REF_CLK-TXD)}
t_{dd(REF_CLK-TXEN)}
t_{d(REF_CLK-TXD)}
t_{dd(REF_CLK-TXEN)}
DESCRIPTION
Delay time, REF_CLK high to selected transmit signals
valid
RMIIn
RMII0
RMII1
MIN
MAX UNIT
2
13.5 ns
2
13.8 ns
REF_CLK (PRCM)
RMII8
RMII11
RMII7
RMII9
RMII10
rmiin_txd1−rmiin_txd0,
rmiin_txen (Outputs)
SPRS8xx_GMAC_RMIITX_06
Figure 7-58. GMAC Transmit Interface Timing RMIIn Operation
In Table 7-78 are presented the specific groupings of signals (IOSET) for use with GMAC RMII signals.
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Timing Requirements and Switching Characteristics 313
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