LM3S2616 Datasheet, PDF (355/753 Pages) Texas Instruments – Stellaris® LM3S2616 Microcontroller

Stellaris® LM3S2616 Microcontroller
a maximum of two per side of the physical package with the total number of high-current GPIO
outputs not exceeding four for the entire package.
9.2.6
Identification
The identification registers configured at reset allow software to detect and identify the module as
a GPIO block. The identification registers include the GPIOPeriphID0-GPIOPeriphID7 registers as
well as the GPIOPCellID0-GPIOPCellID3 registers.
9.3 Initialization and Configuration
The GPIO modules may be accessed via two different memory apertures. The legacy aperture, the
Advanced Peripheral Bus (APB), is backwards-compatible with previous Stellaris^® parts. The other
aperture, the Advanced High-Performance Bus (AHB), offers the same register map but provides
better back-to-back access performance than the APB bus. These apertures are mutually exclusive.
The aperture enabled for a given GPIO port is controlled by the appropriate bit in the GPIOHBCTL
register (see page 196).
To use the GPIO, the peripheral clock must be enabled by setting the appropriate GPIO Port bit
field (GPIOn) in the RCGC2 register.
On reset, all GPIO pins (except for the four JTAG pins) are configured out of reset to be undriven
(tristate): GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0. Table 9-4 on page 355
shows all possible configurations of the GPIO pads and the control register settings required to
achieve them. Table 9-5 on page 356 shows how a rising edge interrupt would be configured for pin
2 of a GPIO port.
Table 9-4. GPIO Pad Configuration Examples
Configuration
GPIO Register Bit Value^a
AFSEL DIR
ODR
DEN
Digital Input (GPIO)
0
0
0
1
Digital Output (GPIO)
0
1
0
1
Open Drain Output
0
1
1
1
(GPIO)
Open Drain
1
X
1
1
Input/Output (I²C)
Digital Input (QEI)
1
X
0
1
Digital Output (PWM)
1
X
0
1
Digital Input/Output
1
X
0
1
(UART)
Analog Input
(Comparator)
0
0
0
0
Digital Output
(Comparator)
1
X
0
1
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
PUR
?
?
X
X
?
?
?
0
?
PDR
?
?
X
X
?
?
?
0
?
DR2R
X
?
?
?
X
?
?
X
?
DR4R
X
?
?
?
X
?
?
X
?
DR8R
X
?
?
?
X
?
?
X
?
SLR
X
?
?
?
X
?
?
X
?
November 17, 2011
355
Texas Instruments-Production Data